{"id":"https://openalex.org/W2940410002","doi":"https://doi.org/10.1145/3312614.3312635","title":"A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs","display_name":"A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs","publication_year":2019,"publication_date":"2019-04-08","ids":{"openalex":"https://openalex.org/W2940410002","doi":"https://doi.org/10.1145/3312614.3312635","mag":"2940410002"},"language":"en","primary_location":{"id":"doi:10.1145/3312614.3312635","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3312614.3312635","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Omni-Layer Intelligent Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017642009","display_name":"J. Christoph Cordes","orcid":null},"institutions":[{"id":"https://openalex.org/I129877168","display_name":"Carl von Ossietzky Universit\u00e4t Oldenburg","ror":"https://ror.org/033n9gh91","country_code":"DE","type":"education","lineage":["https://openalex.org/I129877168"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Jan Cordes","raw_affiliation_strings":["University of Oldenburg, Oldenburg, Lower Saxony"],"affiliations":[{"raw_affiliation_string":"University of Oldenburg, Oldenburg, Lower Saxony","institution_ids":["https://openalex.org/I129877168"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066314815","display_name":"Maher Fakih","orcid":"https://orcid.org/0000-0003-2718-1182"},"institutions":[{"id":"https://openalex.org/I202367325","display_name":"Oldenburger Institut f\u00fcr Informatik","ror":"https://ror.org/003sav189","country_code":"DE","type":"facility","lineage":["https://openalex.org/I202367325"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Maher Fakih","raw_affiliation_strings":["OFFIS - Institute for Information Technology, Oldenburg, Lower Saxony"],"affiliations":[{"raw_affiliation_string":"OFFIS - Institute for Information Technology, Oldenburg, Lower Saxony","institution_ids":["https://openalex.org/I202367325"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5017642009"],"corresponding_institution_ids":["https://openalex.org/I129877168"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.03287242,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"86","last_page":"91"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8079891204833984},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6269776821136475},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.5898545384407043},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5674792528152466},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5608726143836975},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5383262634277344},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4767402410507202},{"id":"https://openalex.org/keywords/functional-design","display_name":"Functional design","score":0.4764833152294159},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.35475894808769226},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.331644207239151},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32162895798683167},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3160218298435211},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2118965983390808}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8079891204833984},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6269776821136475},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.5898545384407043},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5674792528152466},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5608726143836975},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5383262634277344},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4767402410507202},{"id":"https://openalex.org/C64346931","wikidata":"https://www.wikidata.org/wiki/Q4519148","display_name":"Functional design","level":2,"score":0.4764833152294159},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.35475894808769226},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.331644207239151},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32162895798683167},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3160218298435211},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2118965983390808},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3312614.3312635","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3312614.3312635","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Omni-Layer Intelligent Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1423254999","https://openalex.org/W1490783972","https://openalex.org/W1990351156","https://openalex.org/W2040870580","https://openalex.org/W2076796478","https://openalex.org/W2101234009","https://openalex.org/W2396572963","https://openalex.org/W2513568085","https://openalex.org/W2587958335","https://openalex.org/W2618240326","https://openalex.org/W2800017313","https://openalex.org/W2889370604","https://openalex.org/W2903872066","https://openalex.org/W2908539775","https://openalex.org/W6675354045"],"related_works":["https://openalex.org/W2091330445","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2138022277","https://openalex.org/W1631753024","https://openalex.org/W2004325343","https://openalex.org/W2533212402","https://openalex.org/W2592133661","https://openalex.org/W2534143559"],"abstract_inverted_index":{"The":[0],"emergence":[1],"of":[2,23,31,62,73,91],"artificial":[3],"intelligence":[4],"(AI)":[5],"applications":[6],"have":[7],"shown":[8],"great":[9],"benefits":[10],"in":[11,19,33],"saving":[12],"costs":[13],"and":[14,47,93],"at":[15],"the":[16,29,34,44,59,71,78],"same":[17],"time":[18],"executing":[20],"efficiently":[21],"many":[22],"our":[24],"daily":[25],"life":[26],"tasks.":[27],"Yet":[28],"application":[30],"AI":[32,63,75],"safety-critical":[35],"embedded":[36,65],"systems":[37,54],"domain":[38],"is":[39,100],"still":[40],"limited":[41],"due":[42],"to":[43,82],"high":[45],"functional":[46,92],"extra-functional":[48,94],"(real-time,":[49],"power,":[50],"memory)":[51],"requirements":[52,95],"these":[53],"must":[55],"fulfill.":[56],"To":[57],"tap":[58],"full":[60],"potential":[61],"for":[64],"systems,":[66],"a":[67,88],"design-flow":[68],"which":[69],"systematizes":[70],"process":[72],"refining":[74],"implementations":[76],"from":[77],"software":[79],"implementation":[80],"level":[81,85],"hardware":[83],"design":[84],"accompanied":[86],"with":[87],"validation":[89],"flow":[90],"on":[96],"each":[97],"refinement":[98],"level,":[99],"inevitable.":[101]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}