{"id":"https://openalex.org/W2925928499","doi":"https://doi.org/10.1145/3306495","title":"A Novel Resistive Memory-based Process-in-memory Architecture for Efficient Logic and Add Operations","display_name":"A Novel Resistive Memory-based Process-in-memory Architecture for Efficient Logic and Add Operations","publication_year":2019,"publication_date":"2019-03-21","ids":{"openalex":"https://openalex.org/W2925928499","doi":"https://doi.org/10.1145/3306495","mag":"2925928499"},"language":"en","primary_location":{"id":"doi:10.1145/3306495","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3306495","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071148822","display_name":"Taozhong Li","orcid":"https://orcid.org/0000-0002-5421-0199"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Taozhong Li","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100422764","display_name":"Qin Wang","orcid":"https://orcid.org/0000-0001-6824-1351"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qin Wang","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086260915","display_name":"Yongxin Zhu","orcid":"https://orcid.org/0000-0002-1813-1792"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yongxin Zhu","raw_affiliation_strings":["Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008057183","display_name":"Jianfei Jiang","orcid":"https://orcid.org/0000-0002-5521-6197"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianfei Jiang","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054897331","display_name":"Guanghui He","orcid":"https://orcid.org/0000-0002-0486-6421"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guanghui He","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052970732","display_name":"Jing Jin","orcid":"https://orcid.org/0000-0003-3584-5559"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jing Jin","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103236320","display_name":"Zhigang Mao","orcid":"https://orcid.org/0000-0001-9431-9853"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhigang Mao","raw_affiliation_strings":["Shanghai Jiao Tong University, China"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045693138","display_name":"Naifeng Jing","orcid":"https://orcid.org/0000-0001-8417-5796"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Naifeng Jing","raw_affiliation_strings":["Shanghai Jiao Tong University"],"affiliations":[{"raw_affiliation_string":"Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5071148822"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.1192,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.43421674,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"24","issue":"2","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8509204387664795},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.6516846418380737},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5844157338142395},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5328676700592041},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4988057613372803},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.4983079433441162},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49605974555015564},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46258115768432617},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42150789499282837},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41998475790023804},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41803091764450073},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4016401469707489},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.21576601266860962},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13075855374336243},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.11642315983772278},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09778138995170593},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07725989818572998}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8509204387664795},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6516846418380737},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5844157338142395},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5328676700592041},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4988057613372803},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.4983079433441162},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49605974555015564},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46258115768432617},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42150789499282837},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41998475790023804},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41803091764450073},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4016401469707489},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.21576601266860962},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13075855374336243},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.11642315983772278},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09778138995170593},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07725989818572998},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3306495","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3306495","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G8666896920","display_name":null,"funder_award_id":"61772331 and 61674103","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":63,"referenced_works":["https://openalex.org/W1496427046","https://openalex.org/W1542981317","https://openalex.org/W1964109725","https://openalex.org/W1966939297","https://openalex.org/W1969908552","https://openalex.org/W1969911580","https://openalex.org/W1973350439","https://openalex.org/W1975419527","https://openalex.org/W1977030506","https://openalex.org/W1981815116","https://openalex.org/W1992677737","https://openalex.org/W2000321316","https://openalex.org/W2002406245","https://openalex.org/W2004782555","https://openalex.org/W2004823737","https://openalex.org/W2010959282","https://openalex.org/W2013028205","https://openalex.org/W2018714706","https://openalex.org/W2020003503","https://openalex.org/W2025674646","https://openalex.org/W2031559328","https://openalex.org/W2036687738","https://openalex.org/W2043393912","https://openalex.org/W2048508570","https://openalex.org/W2055789895","https://openalex.org/W2061071837","https://openalex.org/W2066280488","https://openalex.org/W2073449168","https://openalex.org/W2081729575","https://openalex.org/W2086112773","https://openalex.org/W2092324191","https://openalex.org/W2093524602","https://openalex.org/W2109574129","https://openalex.org/W2112810750","https://openalex.org/W2115763618","https://openalex.org/W2122148191","https://openalex.org/W2126241821","https://openalex.org/W2126510429","https://openalex.org/W2147814819","https://openalex.org/W2165310699","https://openalex.org/W2178102281","https://openalex.org/W2216132385","https://openalex.org/W2315794112","https://openalex.org/W2396622873","https://openalex.org/W2399958287","https://openalex.org/W2407339173","https://openalex.org/W2414912620","https://openalex.org/W2431884816","https://openalex.org/W2536878608","https://openalex.org/W2540697258","https://openalex.org/W2545376626","https://openalex.org/W2545789532","https://openalex.org/W2603636614","https://openalex.org/W2750945255","https://openalex.org/W2775771159","https://openalex.org/W4243519499","https://openalex.org/W4244457258","https://openalex.org/W4247470388","https://openalex.org/W4253860821","https://openalex.org/W4254672563","https://openalex.org/W4255650914","https://openalex.org/W4298252441","https://openalex.org/W6600096014"],"related_works":["https://openalex.org/W4308870977","https://openalex.org/W4315464822","https://openalex.org/W2061071837","https://openalex.org/W2963965830","https://openalex.org/W4284991650","https://openalex.org/W2606690302","https://openalex.org/W3216275586","https://openalex.org/W2925928499","https://openalex.org/W3200123501","https://openalex.org/W4316659989"],"abstract_inverted_index":{"The":[0],"coming":[1],"era":[2],"of":[3,40,85,115],"big":[4],"data":[5],"revives":[6],"the":[7,13,19,50,69,120,141,153,155,174],"Processing-in-memory":[8],"(PIM)":[9],"architecture":[10],"to":[11,33,43,57,61,95],"relieve":[12],"memory":[14,64,79,103,122],"wall":[15],"problem":[16],"that":[17],"embarrasses":[18],"modern":[20],"computing":[21,30,66,163],"system.":[22],"However,":[23],"most":[24],"existing":[25],"PIM":[26,83,130,157,176],"designs":[27],"just":[28],"put":[29],"units":[31],"closer":[32],"memory,":[34],"rather":[35],"than":[36],"a":[37,77,106,128,136],"complete":[38],"integration":[39],"them":[41],"due":[42],"their":[44],"incompatibility":[45],"in":[46,161],"CMOS":[47],"manufacturing.":[48],"Fortunately,":[49],"emerging":[51],"Resistive-RAM":[52],"(ReRAM)":[53],"offers":[54],"new":[55],"hope":[56],"this":[58,73],"dilemma":[59],"owing":[60],"its":[62],"inherent":[63],"and":[65,88,99,147,165,169],"capability":[67,84],"using":[68,119],"same":[70,121],"device.":[71],"In":[72,152],"article,":[74],"we":[75],"propose":[76],"ReRAM":[78,175],"structure":[80],"with":[81,124],"efficient":[82,113],"both":[86,162],"logic":[87,117,168],"add":[89],"operations.":[90,126],"It":[91],"first":[92],"leverages":[93],"non-linearity":[94],"suppress":[96],"sneak":[97,137],"current":[98,138],"thus":[100],"sustains":[101],"high":[102],"density.":[104],"Using":[105],"differential":[107],"bit":[108],"cell,":[109],"it":[110],"also":[111],"enables":[112],"processing":[114],"arbitrary":[116],"functions":[118],"cells":[123],"non-destructive":[125],"Then,":[127],"novel":[129],"adder":[131,149],"is":[132],"proposed,":[133],"which":[134,171],"customizes":[135],"path":[139],"as":[140],"carry-chain":[142],"for":[143,167,178],"fast":[144],"carry":[145],"propagation":[146],"improves":[148],"performance":[150,166],"significantly.":[151],"experiment,":[154],"proposed":[156],"demonstrates":[158],"higher":[159],"efficiency":[160],"area":[164],"addition,":[170],"greatly":[172],"increases":[173],"applicability":[177],"future":[179],"computable":[180],"architectures.":[181]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}