{"id":"https://openalex.org/W2945116256","doi":"https://doi.org/10.1145/3299874.3318000","title":"System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration","display_name":"System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration","publication_year":2019,"publication_date":"2019-05-13","ids":{"openalex":"https://openalex.org/W2945116256","doi":"https://doi.org/10.1145/3299874.3318000","mag":"2945116256"},"language":"en","primary_location":{"id":"doi:10.1145/3299874.3318000","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3299874.3318000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035121973","display_name":"Jacob P. Covey","orcid":"https://orcid.org/0000-0001-5104-6883"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jacob Covey","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085777351","display_name":"Mark C. Johnson","orcid":"https://orcid.org/0000-0003-1748-1448"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark C. Johnson","raw_affiliation_strings":["Purdue University, West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":0.3917,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.47638889,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"249","last_page":"253"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14089","display_name":"Nanotechnology research and applications","score":0.9812999963760376,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13682","display_name":"Engineering Education and Pedagogy","score":0.9538000226020813,"subfield":{"id":"https://openalex.org/subfields/2216","display_name":"Architecture"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5703656673431396},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5703107714653015},{"id":"https://openalex.org/keywords/engineering-design-process","display_name":"Engineering design process","score":0.5390898585319519},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5198695659637451},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.513155996799469},{"id":"https://openalex.org/keywords/curriculum","display_name":"Curriculum","score":0.4545225203037262},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.443277508020401},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.44135555624961853},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.4296630620956421},{"id":"https://openalex.org/keywords/engineering-management","display_name":"Engineering management","score":0.42557889223098755},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32408371567726135},{"id":"https://openalex.org/keywords/process-integration","display_name":"Process integration","score":0.2618972659111023},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23726636171340942},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10390815138816833}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5703656673431396},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5703107714653015},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.5390898585319519},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5198695659637451},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.513155996799469},{"id":"https://openalex.org/C47177190","wikidata":"https://www.wikidata.org/wiki/Q207137","display_name":"Curriculum","level":2,"score":0.4545225203037262},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.443277508020401},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.44135555624961853},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.4296630620956421},{"id":"https://openalex.org/C110354214","wikidata":"https://www.wikidata.org/wiki/Q6314146","display_name":"Engineering management","level":1,"score":0.42557889223098755},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32408371567726135},{"id":"https://openalex.org/C54725748","wikidata":"https://www.wikidata.org/wiki/Q7247277","display_name":"Process integration","level":2,"score":0.2618972659111023},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23726636171340942},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10390815138816833},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C21880701","wikidata":"https://www.wikidata.org/wiki/Q2144042","display_name":"Process engineering","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C19417346","wikidata":"https://www.wikidata.org/wiki/Q7922","display_name":"Pedagogy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3299874.3318000","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3299874.3318000","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5199999809265137}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2608162071"],"related_works":["https://openalex.org/W2388040150","https://openalex.org/W4230718388","https://openalex.org/W2002682434","https://openalex.org/W2102117846","https://openalex.org/W2481546399","https://openalex.org/W3149244010","https://openalex.org/W2047284788","https://openalex.org/W2148601120","https://openalex.org/W2101430679","https://openalex.org/W3085686413"],"abstract_inverted_index":{"The":[0,34,69],"design":[1,30,43,100,111,119],"of":[2,24,53,60,77],"microelectronic":[3],"systems":[4],"requires":[5],"integration":[6,121],"and":[7,65,80,118,134],"cooperation":[8],"across":[9],"multiple":[10],"disciplines,":[11],"but":[12],"most":[13],"curriculum":[14],"is":[15,40,49],"taught":[16],"in":[17,57],"unconnected":[18],"pieces.":[19],"This":[20,123],"makes":[21],"the":[22,29,58,78,87],"creation":[23],"manageable":[25],"projects":[26],"that":[27],"reflect":[28],"experience":[31],"very":[32],"difficult.":[33],"System-on-a-Chip":[35],"Extension":[36],"Technologies":[37],"(SoCET)":[38],"group":[39,44,70],"an":[41,67,131],"undergraduate":[42,55],"modelled":[45],"after":[46],"industry.":[47],"SoCET":[48,88],"a":[50,107],"multi-semester":[51],"project":[52],"primarily":[54],"students":[56,114,126],"process":[59,133],"iteratively":[61],"improving,":[62],"prototyping,":[63],"fabricating,":[64],"testing":[66],"SoC.":[68],"recently":[71],"taped":[72],"out":[73],"its":[74],"fourth":[75],"iteration":[76],"SoC":[79,99],"submitted":[81],"it":[82],"for":[83],"fabrication.":[84],"Students":[85],"on":[86,97],"team":[89],"are":[90,104],"divided":[91],"into":[92],"smaller":[93],"groups":[94],"which":[95],"focus":[96],"specific":[98],"tasks.":[101],"These":[102],"tasks":[103],"connected":[105],"by":[106],"near":[108],"industry":[109],"grade":[110],"flow":[112,120],"forcing":[113],"to":[115,127],"address":[116],"system":[117],"issues.":[122],"framework":[124],"enables":[125],"approach":[128],"engineering":[129],"as":[130],"integrative":[132],"learn":[135],"relationships":[136],"between":[137],"seemingly":[138],"separate":[139],"disciplines.":[140]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}