{"id":"https://openalex.org/W2945364825","doi":"https://doi.org/10.1145/3299874.3317972","title":"A Processing-In-Memory Implementation of SHA-3 Using a Voltage-Gated Spin Hall-Effect Driven MTJ-based Crossbar","display_name":"A Processing-In-Memory Implementation of SHA-3 Using a Voltage-Gated Spin Hall-Effect Driven MTJ-based Crossbar","publication_year":2019,"publication_date":"2019-05-13","ids":{"openalex":"https://openalex.org/W2945364825","doi":"https://doi.org/10.1145/3299874.3317972","mag":"2945364825"},"language":"en","primary_location":{"id":"doi:10.1145/3299874.3317972","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3299874.3317972","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3299874.3317972","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3299874.3317972","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016268650","display_name":"Chengmo Yang","orcid":"https://orcid.org/0000-0003-0978-1504"},"institutions":[{"id":"https://openalex.org/I86501945","display_name":"University of Delaware","ror":"https://ror.org/01sbq1a82","country_code":"US","type":"education","lineage":["https://openalex.org/I86501945"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chengmo Yang","raw_affiliation_strings":["University of Delaware, Newark, DE, USA"],"affiliations":[{"raw_affiliation_string":"University of Delaware, Newark, DE, USA","institution_ids":["https://openalex.org/I86501945"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100662066","display_name":"Zeyu Chen","orcid":"https://orcid.org/0009-0009-1529-6012"},"institutions":[{"id":"https://openalex.org/I86501945","display_name":"University of Delaware","ror":"https://ror.org/01sbq1a82","country_code":"US","type":"education","lineage":["https://openalex.org/I86501945"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zeyu Chen","raw_affiliation_strings":["University of Delaware, Newark, DE, USA"],"affiliations":[{"raw_affiliation_string":"University of Delaware, Newark, DE, USA","institution_ids":["https://openalex.org/I86501945"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5016268650"],"corresponding_institution_ids":["https://openalex.org/I86501945"],"apc_list":null,"apc_paid":null,"fwci":0.2421,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.5417526,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"200"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.8447480201721191},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7376052737236023},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.631430983543396},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6255797147750854},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.47278475761413574},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4672648310661316},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46102696657180786},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4061220586299896},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.361960768699646},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3544347882270813},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2878159284591675},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12675824761390686},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.12111508846282959},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.10702931880950928}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.8447480201721191},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7376052737236023},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.631430983543396},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6255797147750854},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.47278475761413574},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4672648310661316},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46102696657180786},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4061220586299896},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.361960768699646},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3544347882270813},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2878159284591675},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12675824761390686},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.12111508846282959},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.10702931880950928},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3299874.3317972","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3299874.3317972","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3299874.3317972","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3299874.3317972","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3299874.3317972","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3299874.3317972","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7559381144","display_name":null,"funder_award_id":"1527464","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2945364825.pdf","grobid_xml":"https://content.openalex.org/works/W2945364825.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W1545705789","https://openalex.org/W2004823737","https://openalex.org/W2010202670","https://openalex.org/W2025674646","https://openalex.org/W2081489694","https://openalex.org/W2081729575","https://openalex.org/W2315794112","https://openalex.org/W2415605917","https://openalex.org/W2527572152","https://openalex.org/W2583234992","https://openalex.org/W2610663466","https://openalex.org/W2612905056","https://openalex.org/W2619630761","https://openalex.org/W2741582625"],"related_works":["https://openalex.org/W2145932742","https://openalex.org/W2554791727","https://openalex.org/W3146164987","https://openalex.org/W1874409533","https://openalex.org/W1981395029","https://openalex.org/W2108083791","https://openalex.org/W4250137794","https://openalex.org/W2086829516","https://openalex.org/W2063341228","https://openalex.org/W2111673944"],"abstract_inverted_index":{"Processing-In-Memory":[0],"(PIM),":[1],"which":[2,64],"implements":[3],"logic":[4],"operations":[5],"within":[6],"memory":[7,26],"cells,":[8],"opens":[9],"up":[10],"a":[11,41,46,52,69,112],"new":[12],"direction":[13],"on":[14],"organizing":[15],"data":[16],"and":[17,33,87,90],"computation.":[18],"Leveraging":[19],"resistive":[20],"or":[21],"magnetic":[22,58],"characteristics":[23],"of":[24,44,72,80,93],"nonvolatile":[25],"(NVM)":[27],"devices,":[28],"platforms":[29],"such":[30],"as":[31],"PLiM":[32],"ReVAMP":[34],"have":[35],"been":[36],"proposed.":[37],"This":[38],"paper":[39],"presents":[40],"PIM":[42],"implementation":[43,103],"SHA-3,":[45],"state-of-the-art":[47,113],"secure":[48],"hash":[49,128],"algorithm":[50],"using":[51],"Voltage-Gated":[53],"Spin":[54],"Hall-Effect":[55],"(SHE)":[56],"Driven":[57],"tunnel":[59],"junction":[60],"(MTJ)":[61],"based":[62,116],"crossbar,":[63],"is":[65,104],"able":[66,105],"to":[67,106],"achieve":[68,107],"complete":[70],"set":[71],"Boolean":[73],"operations.":[74],"The":[75],"work":[76],"includes":[77],"the":[78,81,84,99],"design":[79],"crossbar":[82],"circuit,":[83],"instruction":[85],"set,":[86],"both":[88],"unpipelined":[89],"pipelined":[91],"implementations":[92],"SHA-3.":[94],"Experimental":[95],"results":[96],"show":[97],"that":[98],"proposed":[100],"SHE":[101],"MTJ-based":[102],"2.16X":[108],"higher":[109],"throughput":[110,120],"than":[111],"Resistive":[114],"RAM":[115],"SHA-3":[117],"implementation.":[118],"Further":[119],"improvement":[121],"can":[122],"be":[123],"achieved":[124],"with":[125],"multiple":[126],"message":[127],"(MMH)":[129],"pipelining.":[130]},"counts_by_year":[{"year":2022,"cited_by_count":2}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}
