{"id":"https://openalex.org/W2920545734","doi":"https://doi.org/10.1145/3297156.3297160","title":"Application of Deep Learning in Analog Circuit Sizing","display_name":"Application of Deep Learning in Analog Circuit Sizing","publication_year":2018,"publication_date":"2018-12-08","ids":{"openalex":"https://openalex.org/W2920545734","doi":"https://doi.org/10.1145/3297156.3297160","mag":"2920545734"},"language":"en","primary_location":{"id":"doi:10.1145/3297156.3297160","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3297156.3297160","pdf_url":null,"source":{"id":"https://openalex.org/S4306523626","display_name":"Proceedings of the 2018 2nd International Conference on Computer Science and Artificial Intelligence","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 2nd International Conference on Computer Science and Artificial Intelligence","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107997560","display_name":"Zhenyu Wang","orcid":"https://orcid.org/0000-0002-8909-6525"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhenyu Wang","raw_affiliation_strings":["Dept. Micro/Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Dept. Micro/Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060833244","display_name":"Xiangzhong Luo","orcid":"https://orcid.org/0000-0002-0758-2248"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiangzhong Luo","raw_affiliation_strings":["Dept. Micro/Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"Dept. Micro/Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028655194","display_name":"Zheng Gong","orcid":"https://orcid.org/0000-0002-6538-7344"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zheng Gong","raw_affiliation_strings":["Dept. of Computer Science and Engineering, Shanghai Jiao Tong University"],"affiliations":[{"raw_affiliation_string":"Dept. of Computer Science and Engineering, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5107997560"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.9468,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.74822877,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"571","last_page":"575"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.7900197505950928},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.7136386036872864},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6863260865211487},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5459796190261841},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5289119482040405},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.5198953151702881},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.5026073455810547},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4246428906917572},{"id":"https://openalex.org/keywords/recurrent-neural-network","display_name":"Recurrent neural network","score":0.41177111864089966},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4005604386329651},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3771754503250122},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.3656477928161621},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3505336344242096},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.34925222396850586},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.30425482988357544},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.208575040102005},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1581360101699829},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.0730084776878357}],"concepts":[{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.7900197505950928},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.7136386036872864},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6863260865211487},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5459796190261841},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5289119482040405},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.5198953151702881},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.5026073455810547},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4246428906917572},{"id":"https://openalex.org/C147168706","wikidata":"https://www.wikidata.org/wiki/Q1457734","display_name":"Recurrent neural network","level":3,"score":0.41177111864089966},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4005604386329651},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3771754503250122},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.3656477928161621},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3505336344242096},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.34925222396850586},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.30425482988357544},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.208575040102005},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1581360101699829},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0730084776878357},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3297156.3297160","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3297156.3297160","pdf_url":null,"source":{"id":"https://openalex.org/S4306523626","display_name":"Proceedings of the 2018 2nd International Conference on Computer Science and Artificial Intelligence","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 2nd International Conference on Computer Science and Artificial Intelligence","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1677182931","https://openalex.org/W1999357165","https://openalex.org/W2064675550","https://openalex.org/W2076063813","https://openalex.org/W2093276802","https://openalex.org/W2095705004","https://openalex.org/W2106024901","https://openalex.org/W2112667233","https://openalex.org/W2120889849","https://openalex.org/W2535746608","https://openalex.org/W2542253693","https://openalex.org/W2783569584"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W4310191457","https://openalex.org/W2499505660","https://openalex.org/W2167327848","https://openalex.org/W3166315890","https://openalex.org/W3037468513","https://openalex.org/W2120134802","https://openalex.org/W2182902953","https://openalex.org/W1933057227","https://openalex.org/W2122222688"],"abstract_inverted_index":{"Operational":[0],"amplifiers":[1],"(opamp)":[2],"are":[3],"the":[4,18,31,35,42,51,66,73,78,81,88,96,104,136,150,153,156,159,165,168],"most":[5],"common":[6],"structures":[7],"in":[8],"analog":[9,70],"circuit.":[10],"However,":[11],"opamp":[12,36],"sizing":[13,28,67,137],"problems":[14],"rely":[15],"heavily":[16],"on":[17],"designer's":[19],"personal":[20],"experience.":[21],"One":[22],"problem":[23,68],"that":[24,30,75,132,144],"hampers":[25],"opamp's":[26],"automatic":[27],"is":[29,38,83,162,170],"search":[32,43],"space":[33],"for":[34],"size":[37,151],"too":[39],"large,":[40],"making":[41],"process":[44],"time":[45],"consuming.":[46],"In":[47,108],"recent":[48],"years,":[49],"with":[50],"rapid":[52],"development":[53],"of":[54,69,92,152,158,167],"GPU-based":[55],"deep":[56,129],"learning":[57,130],"technology,":[58],"it":[59],"has":[60],"become":[61],"possible":[62],"to":[63,85,103,126],"automatically":[64,86,134],"explore":[65],"circuits":[71],"through":[72],"machine;":[74],"is,":[76],"given":[77],"performance":[79,99,106],"index,":[80],"machine":[82],"required":[84],"output":[87,97],"length":[89],"and":[90,95,121,164],"width":[91],"each":[93],"transistor":[94],"circuit":[98],"should":[100],"be":[101],"close":[102],"input":[105],"specifications.":[107],"this":[109],"paper,":[110],"we":[111],"use":[112],"two":[113,128],"neural":[114],"network":[115],"structures,":[116],"Recurrent":[117],"Neural":[118,123],"Network":[119,124],"(RNN)":[120],"Deep":[122],"(DNN),":[125],"construct":[127],"models":[131],"can":[133,147],"solve":[135],"problem.":[138],"The":[139],"final":[140],"simulation":[141],"results":[142],"show":[143],"our":[145],"model":[146,161],"accurately":[148],"predict":[149],"transistor,":[154],"where":[155],"accuracy":[157,166],"RNN":[160],"92.6%,":[163],"DNN":[169],"95.6%.":[171]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":3},{"year":2020,"cited_by_count":2}],"updated_date":"2026-02-27T16:54:17.756197","created_date":"2025-10-10T00:00:00"}