{"id":"https://openalex.org/W2918505580","doi":"https://doi.org/10.1145/3290420.3290441","title":"Optimization of FPGA-based LDPC decoder using high-level synthesis","display_name":"Optimization of FPGA-based LDPC decoder using high-level synthesis","publication_year":2018,"publication_date":"2018-11-02","ids":{"openalex":"https://openalex.org/W2918505580","doi":"https://doi.org/10.1145/3290420.3290441","mag":"2918505580"},"language":"en","primary_location":{"id":"doi:10.1145/3290420.3290441","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3290420.3290441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th International Conference on Communication and Information Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045447466","display_name":"Geon Y. Choi","orcid":null},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Geon Choi","raw_affiliation_strings":["Hanyang University"],"affiliations":[{"raw_affiliation_string":"Hanyang University","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022627580","display_name":"Kyeong-Bin Park","orcid":null},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyeong-Bin Park","raw_affiliation_strings":["Hanyang University, Seoul, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Hanyang University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090391516","display_name":"Ki\u2010Seok Chung","orcid":"https://orcid.org/0000-0002-2908-8443"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Ki-Seok Chung","raw_affiliation_strings":["Hanyang University"],"affiliations":[{"raw_affiliation_string":"Hanyang University","institution_ids":["https://openalex.org/I4575257"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5045447466"],"corresponding_institution_ids":["https://openalex.org/I4575257"],"apc_list":null,"apc_paid":null,"fwci":0.1845,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.58999218,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"256","last_page":"259"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12029","display_name":"DNA and Biological Computing","score":0.9828000068664551,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.8163943290710449},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8114235401153564},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7933003902435303},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.6516898274421692},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6164278984069824},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.54837965965271},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49188780784606934},{"id":"https://openalex.org/keywords/loop-unrolling","display_name":"Loop unrolling","score":0.48957380652427673},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4617348909378052},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4546743333339691},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3500348627567291},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23387429118156433}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.8163943290710449},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8114235401153564},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7933003902435303},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.6516898274421692},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6164278984069824},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.54837965965271},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49188780784606934},{"id":"https://openalex.org/C76970557","wikidata":"https://www.wikidata.org/wiki/Q1869750","display_name":"Loop unrolling","level":3,"score":0.48957380652427673},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4617348909378052},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4546743333339691},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3500348627567291},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23387429118156433},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3290420.3290441","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3290420.3290441","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 4th International Conference on Communication and Information Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W596214406","https://openalex.org/W2126259959","https://openalex.org/W2128765501","https://openalex.org/W2307911067","https://openalex.org/W2558817518"],"related_works":["https://openalex.org/W2921149022","https://openalex.org/W1044727952","https://openalex.org/W3003393365","https://openalex.org/W2353338231","https://openalex.org/W2035769530","https://openalex.org/W2064674583","https://openalex.org/W4299647765","https://openalex.org/W2388275429","https://openalex.org/W2077272551","https://openalex.org/W1979159634"],"abstract_inverted_index":{"Low":[0],"Density":[1],"Parity":[2],"Check":[3],"(LDPC)":[4],"codes":[5],"are":[6,162],"widely":[7,81],"used":[8,108],"in":[9,56,61,97],"various":[10,63],"communication":[11],"and":[12,60,75,101,128,159,180,190],"storage":[13],"systems":[14],"due":[15],"to":[16,109],"outstanding":[17],"error":[18],"correcting":[19],"capability.":[20],"In":[21,89],"this":[22,90],"paper,":[23,91],"we":[24,92],"present":[25],"a":[26,45,49,84,102,117,139,187,193],"Field":[27],"Programmable":[28],"Gate":[29],"Array":[30],"(FPGA)":[31],"implementation":[32,47,176,189],"of":[33,67,71,138,167,173,186,192],"the":[34,68,111,132,165,170,174],"LDPC":[35,95,119,195],"decoder":[36,96,120,141],"using":[37],"High-Level":[38],"Synthesis":[39],"(HLS).":[40],"Because":[41],"HLS":[42,77,103],"can":[43],"synthesize":[44,110],"hardware":[46,86,126],"from":[48],"high-level":[50],"description,":[51],"it":[52],"is":[53,73,80,107,116,142,177],"very":[54],"effective":[55],"reducing":[57],"design":[58,64,115],"time,":[59],"exploring":[62],"alternatives.":[65],"One":[66],"biggest":[69],"advantages":[70],"FPGAs":[72,79],"flexibility,":[74],"therefore,":[76],"for":[78],"adopted":[82],"as":[83,152],"good":[85],"synthesis":[87],"method.":[88],"describe":[93],"an":[94],"high":[98],"level":[99],"language,":[100],"tool":[104],"called":[105],"SDSoC":[106],"decoder.":[112],"The":[113,135],"proposed":[114,175],"serial":[118,140],"that":[121,185,191],"requires":[122],"smaller":[123],"amount":[124],"on":[125],"resource":[127],"power":[129],"consumption":[130],"than":[131,184],"conventional":[133],"design.":[134],"major":[136],"drawback":[137],"slow":[143],"speed.":[144],"To":[145],"overcome":[146],"such":[147,151],"drawback,":[148],"optimization":[149],"techniques":[150],"array":[153],"partitioning,":[154],"loop":[155],"unrolling,":[156],"pipelining":[157],"methods":[158],"fixed-point":[160],"conversion":[161],"applied.":[163],"With":[164],"application":[166],"these":[168],"techniques,":[169],"decoding":[171],"speed":[172],"8.11":[178],"times":[179,182],"2.79":[181],"faster":[183],"non-optimized":[188],"software-based":[194],"decoder,":[196],"respectively.":[197]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}