{"id":"https://openalex.org/W2917400546","doi":"https://doi.org/10.1145/3289602.3293933","title":"Scalable High Performance SDN Switch Architecture on FPGA for Core Networks","display_name":"Scalable High Performance SDN Switch Architecture on FPGA for Core Networks","publication_year":2019,"publication_date":"2019-02-20","ids":{"openalex":"https://openalex.org/W2917400546","doi":"https://doi.org/10.1145/3289602.3293933","mag":"2917400546"},"language":"en","primary_location":{"id":"doi:10.1145/3289602.3293933","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3289602.3293933","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036985229","display_name":"Sasindu Wijeratne","orcid":"https://orcid.org/0000-0002-5538-2988"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":true,"raw_author_name":"Sasindu Wijeratne","raw_affiliation_strings":["University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026799860","display_name":"Ashen Ekanayake","orcid":null},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Ashen Ekanayake","raw_affiliation_strings":["University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050375730","display_name":"Sandaruwan Jayaweera","orcid":"https://orcid.org/0009-0002-0066-0263"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Sandaruwan Jayaweera","raw_affiliation_strings":["University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004389447","display_name":"Danuka Ravishan","orcid":null},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Danuka Ravishan","raw_affiliation_strings":["University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071939695","display_name":"Ajith Pasqual","orcid":"https://orcid.org/0000-0001-9728-9098"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Ajith Pasqual","raw_affiliation_strings":["University of Moratuwa, Moratuwa, Sri Lanka"],"affiliations":[{"raw_affiliation_string":"University of Moratuwa, Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5036985229"],"corresponding_institution_ids":["https://openalex.org/I195740183"],"apc_list":null,"apc_paid":null,"fwci":0.8842,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.75614423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"117","last_page":"117"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/openflow","display_name":"OpenFlow","score":0.9157583117485046},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7250149846076965},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5791735649108887},{"id":"https://openalex.org/keywords/software-defined-networking","display_name":"Software-defined networking","score":0.5396625399589539},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.5301631093025208},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5185616612434387},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5030290484428406},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.4301258325576782},{"id":"https://openalex.org/keywords/network-architecture","display_name":"Network architecture","score":0.42975515127182007},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.42388206720352173},{"id":"https://openalex.org/keywords/core-network","display_name":"Core network","score":0.4145391285419464},{"id":"https://openalex.org/keywords/forwarding-plane","display_name":"Forwarding plane","score":0.4121400713920593},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3260959982872009},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24772483110427856}],"concepts":[{"id":"https://openalex.org/C192697461","wikidata":"https://www.wikidata.org/wiki/Q4045918","display_name":"OpenFlow","level":3,"score":0.9157583117485046},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7250149846076965},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5791735649108887},{"id":"https://openalex.org/C77270119","wikidata":"https://www.wikidata.org/wiki/Q1655198","display_name":"Software-defined networking","level":2,"score":0.5396625399589539},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.5301631093025208},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5185616612434387},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5030290484428406},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.4301258325576782},{"id":"https://openalex.org/C193415008","wikidata":"https://www.wikidata.org/wiki/Q639681","display_name":"Network architecture","level":2,"score":0.42975515127182007},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.42388206720352173},{"id":"https://openalex.org/C5038329","wikidata":"https://www.wikidata.org/wiki/Q1142907","display_name":"Core network","level":2,"score":0.4145391285419464},{"id":"https://openalex.org/C10597312","wikidata":"https://www.wikidata.org/wiki/Q5473302","display_name":"Forwarding plane","level":3,"score":0.4121400713920593},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3260959982872009},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24772483110427856}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3289602.3293933","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3289602.3293933","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2051935741","https://openalex.org/W4211055425","https://openalex.org/W2292300552","https://openalex.org/W4243609393","https://openalex.org/W3042077637","https://openalex.org/W2560450376","https://openalex.org/W2738801488","https://openalex.org/W2508315983","https://openalex.org/W2901563743","https://openalex.org/W2772741848"],"abstract_inverted_index":{"Due":[0],"to":[1,12,120,136,149,170,188],"the":[2,43,67,121,133,195],"increasing":[3],"heterogeneity":[4],"in":[5,19,32,37,50,191,232],"network":[6,14,20,113],"user":[7],"requirements,":[8],"dynamically":[9],"varying":[10],"day":[11,13],"traffic":[15],"patterns":[16],"and":[17,30,115,140,209,223],"delay":[18],"service":[21],"deployment,":[22],"there":[23],"is":[24,62,78,108,166,197],"a":[25,97,104,158,171,176],"huge":[26],"demand":[27],"for":[28,42,70,199],"scalability":[29],"flexibility":[31],"modern":[33],"networking":[34],"infrastructure,":[35],"which":[36,61,91,107,181,217],"return":[38],"has":[39],"paved":[40],"way":[41],"introduction":[44],"of":[45,73,86,99,110,168,206,221],"Software":[46],"Defined":[47],"Networking":[48],"(SDN)":[49],"core":[51,112,192,233],"networks.":[52,193,234],"In":[53],"this":[54,227],"paper,":[55],"we":[56],"present":[57],"an":[58,87,116,183],"FPGA-based":[59],"switch":[60,76],"fully":[63],"compliant":[64],"with":[65],"OpenFlow;":[66],"pioneering":[68],"protocol":[69],"southbound":[71],"interface":[72],"SDN.":[74],"The":[75,83,101,143],"architecture":[77,102,131,145,196,228],"completely":[79],"implemented":[80],"on":[81,157],"hardware.":[82],"design":[84,135],"consists":[85],"OpenFlow":[88,94],"Southbound":[89],"agent":[90],"can":[92,229],"process":[93],"packets":[95],"at":[96,185],"rate":[98],"10Gbps.":[100],"contains":[103],"primary":[105],"pipeline":[106,118],"capable":[109,167],"achieving":[111],"throughputs":[114],"auxiliary":[117],"leading":[119],"Openflow":[122],"agent.":[123],"Single":[124],"clock":[125],"cycle":[126],"Content":[127],"Accessible":[128],"Memory":[129],"(CAM)":[130],"supports":[132],"overall":[134],"achieve":[137],"its":[138],"throughput":[139],"latency":[141],"requirements.":[142],"proposed":[144],"speed":[146],"scales":[147],"up":[148],"400Gbps":[150],"while":[151],"it":[152],"consumes":[153],"only":[154],"60%":[155],"resources":[156],"Xilinx":[159],"Virtex-7":[160],"featuring":[161],"XC7VX485T":[162],"FPGA.":[163],"Switch":[164],"fabric":[165],"connecting":[169],"control":[172],"plane":[173],"running":[174],"upon":[175],"host":[177],"PC":[178],"via":[179],"PCIe":[180],"provides":[182],"opportunity":[184],"research":[186],"level":[187],"explore":[189],"SDN":[190],"Moreover,":[194],"experimented":[198],"different":[200],"scaled":[201],"versions":[202],"using":[203,212],"line":[204,225],"rates":[205],"10G,":[207],"25G":[208],"100G.":[210],"By":[211],"FPGA":[213],"based":[214],"embedded":[215],"platforms":[216],"support":[218],"sufficient":[219],"number":[220],"ports":[222],"their":[224],"rates,":[226],"be":[230],"deployed":[231]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}