{"id":"https://openalex.org/W2915470884","doi":"https://doi.org/10.1145/3289602.3293909","title":"A Modular Heterogeneous Stack for Deploying FPGAs and CPUs in the Data Center","display_name":"A Modular Heterogeneous Stack for Deploying FPGAs and CPUs in the Data Center","publication_year":2019,"publication_date":"2019-02-20","ids":{"openalex":"https://openalex.org/W2915470884","doi":"https://doi.org/10.1145/3289602.3293909","mag":"2915470884"},"language":"en","primary_location":{"id":"doi:10.1145/3289602.3293909","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3289602.3293909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070042639","display_name":"Nariman Eskandari","orcid":"https://orcid.org/0000-0003-3038-5186"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Nariman Eskandari","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001230588","display_name":"Naif Tarafdar","orcid":"https://orcid.org/0000-0002-5852-5577"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Naif Tarafdar","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053568381","display_name":"Daniel Ly-Ma","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Daniel Ly-Ma","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035437657","display_name":"Paul Chow","orcid":"https://orcid.org/0000-0002-0523-7117"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Paul Chow","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5070042639"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":4.3338,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.94821289,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"262","last_page":"271"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8237414360046387},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.7259420156478882},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6628156304359436},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6584850549697876},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.65362149477005},{"id":"https://openalex.org/keywords/protocol-stack","display_name":"Protocol stack","score":0.5417370200157166},{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.4949316382408142},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.45846402645111084},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4539584219455719},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4527776539325714},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.37105029821395874},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3320227265357971},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3268335461616516},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.27974337339401245}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8237414360046387},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.7259420156478882},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6628156304359436},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6584850549697876},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.65362149477005},{"id":"https://openalex.org/C38601921","wikidata":"https://www.wikidata.org/wiki/Q1757693","display_name":"Protocol stack","level":3,"score":0.5417370200157166},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.4949316382408142},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.45846402645111084},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4539584219455719},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4527776539325714},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.37105029821395874},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3320227265357971},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3268335461616516},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.27974337339401245},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3289602.3293909","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3289602.3293909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1563299586","https://openalex.org/W1825216778","https://openalex.org/W1982516565","https://openalex.org/W2081612620","https://openalex.org/W2127034683","https://openalex.org/W2133156997","https://openalex.org/W2133665104","https://openalex.org/W2322632975","https://openalex.org/W2559305746","https://openalex.org/W2583220202","https://openalex.org/W2732466471","https://openalex.org/W2762795505","https://openalex.org/W2901123440","https://openalex.org/W2947198853"],"related_works":["https://openalex.org/W107105315","https://openalex.org/W1584537303","https://openalex.org/W4388155270","https://openalex.org/W4367156293","https://openalex.org/W2750549761","https://openalex.org/W1872724644","https://openalex.org/W28826848","https://openalex.org/W2122272819","https://openalex.org/W2994151208","https://openalex.org/W2130894091"],"abstract_inverted_index":{"In":[0],"this":[1,105],"work":[2],"we":[3],"present":[4],"a":[5,44],"heterogeneous":[6,72],"deployment":[7],"stack,":[8,69],"calledGalapagos,":[9],"that":[10,100],"includes":[11],"the":[12,19,47,117,127,131,136,146,150],"abstraction":[13],"of":[14,28,49,87,138],"individual":[15],"nodes":[16,23,30],"(FPGAsand":[17],"CPUs),":[18],"communication":[20,58,61,73],"protocols":[21,56],"between":[22,74],"and":[24,26,77,113,119],"theorchestration":[25],"connection":[27],"these":[29],"into":[31],"clusters.":[32],"The":[33,60],"stackwe":[34],"create":[35],"is":[36],"also":[37],"highly":[38],"modular,":[39],"allowing":[40,89],"users":[41],"to":[42,83,91,104],"explore":[43],"designspace":[45],"in":[46,95,116],"implementation":[48],"their":[50],"cluster":[51,151],"such":[52],"as":[53,141],"different":[54],"net-work":[55],"or":[57],"layers.":[59],"layerwe":[62],"have":[63,98],"currently":[64],"implemented":[65],"within":[66],"our":[67,101,139,142],"hardware":[68,93],"calledHUMboldt,":[70],"handles":[71],"multi-ple":[75],"FPGAs":[76,118],"CPUs.":[78],"We":[79],"implementHUMboldtusing":[80],"High-LevelSynthesis":[81],"(HLS)":[82],"ensure":[84],"functional":[85],"portability":[86],"communicatingkernels,":[88],"us":[90],"prototype":[92],"kernels":[94],"software.":[96],"Ourresults":[97],"shown":[99],"modular":[102],"approach":[103],"heterogeneousdeployment":[106],"stack":[107],"has":[108],"introduced":[109],"very":[110],"little":[111],"area":[112],"latency":[114],"over-head":[115],"can":[120],"still":[121],"perform":[122],"at":[123],"line-rate,":[124],"bottleneckedsolely":[125],"by":[126,145],"network":[128,147],"links":[129,148],"connecting":[130],"nodes.":[132],"Our":[133],"results":[134],"alsohighlight":[135],"scalability":[137],"design":[140],"performance":[143],"remainslimited":[144],"when":[149],"size":[152],"increases.":[153]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}