{"id":"https://openalex.org/W2907986904","doi":"https://doi.org/10.1145/3240302.3240427","title":"Memory-system requirements for convolutional neural networks","display_name":"Memory-system requirements for convolutional neural networks","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2907986904","doi":"https://doi.org/10.1145/3240302.3240427","mag":"2907986904"},"language":"en","primary_location":{"id":"doi:10.1145/3240302.3240427","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3240302.3240427","pdf_url":null,"source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005995780","display_name":"Antara Ganguly","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Antara Ganguly","raw_affiliation_strings":["Indian Institute of Technology Bombay, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073587430","display_name":"Virendra Singh","orcid":"https://orcid.org/0000-0002-7035-7844"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["Indian Institute of Technology Bombay, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054500178","display_name":"Rajeev Muralidhar","orcid":"https://orcid.org/0000-0003-3222-3738"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajeev Muralidhar","raw_affiliation_strings":["Intel India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel India","institution_ids":["https://openalex.org/I4210146682"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027837299","display_name":"Masahiro Fujita","orcid":"https://orcid.org/0000-0002-6516-4175"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Fujita","raw_affiliation_strings":["The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4406,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.54974311,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"197"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.821821928024292},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.7169385552406311},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7124391198158264},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.6542443633079529},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4840187728404999},{"id":"https://openalex.org/keywords/structuring","display_name":"Structuring","score":0.4495849609375},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.43588465452194214},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42919033765792847},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.41207608580589294},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.40585458278656006},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3279356360435486},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3213786780834198},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2726573348045349},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24338838458061218},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1899503767490387},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.17305907607078552},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09091076254844666}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.821821928024292},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.7169385552406311},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7124391198158264},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.6542443633079529},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4840187728404999},{"id":"https://openalex.org/C2775945657","wikidata":"https://www.wikidata.org/wiki/Q381442","display_name":"Structuring","level":2,"score":0.4495849609375},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.43588465452194214},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42919033765792847},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.41207608580589294},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.40585458278656006},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3279356360435486},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3213786780834198},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2726573348045349},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24338838458061218},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1899503767490387},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.17305907607078552},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09091076254844666},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3240302.3240427","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3240302.3240427","pdf_url":null,"source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1551401333","https://openalex.org/W1600897098","https://openalex.org/W1686810756","https://openalex.org/W1981220134","https://openalex.org/W1983096721","https://openalex.org/W2001870828","https://openalex.org/W2026247162","https://openalex.org/W2048466306","https://openalex.org/W2092608522","https://openalex.org/W2122636510","https://openalex.org/W2125203716","https://openalex.org/W2144346774","https://openalex.org/W2442974303","https://openalex.org/W2474451066","https://openalex.org/W2518511512","https://openalex.org/W2582737986","https://openalex.org/W2605347906","https://openalex.org/W2622164283","https://openalex.org/W2906043559","https://openalex.org/W2919115771","https://openalex.org/W3105314253","https://openalex.org/W3125984961","https://openalex.org/W4239722617","https://openalex.org/W4292169167"],"related_works":["https://openalex.org/W4394443292","https://openalex.org/W4251394462","https://openalex.org/W1580673008","https://openalex.org/W3120961607","https://openalex.org/W1510936208","https://openalex.org/W2486167009","https://openalex.org/W2339034473","https://openalex.org/W4200309432","https://openalex.org/W1806602459","https://openalex.org/W1975698617"],"abstract_inverted_index":{"Energy":[0],"efficiency":[1,56,77,129],"of":[2,26,31,49,57,63,78,93,106,113,124,132],"the":[3,22,29,54,61,75,90,102],"underlying":[4],"memory":[5,70,83],"systems":[6,84,88],"is":[7,18,118],"a":[8],"huge":[9],"issue":[10],"in":[11,28,65,81,127],"most":[12],"neural":[13,32,51,67,134],"network":[14],"accelerator":[15],"designs.":[16],"It":[17],"imperative":[19],"to":[20,34],"understand":[21],"characteristics":[23],"and":[24,72,89],"behavior":[25],"data":[27],"algorithm":[30],"networks":[33,52],"gain":[35],"an":[36,122],"insight":[37],"into":[38],"their":[39,69,79],"impact":[40],"on":[41,53],"memory-systems.":[42],"The":[43],"current":[44],"work":[45],"studies":[46],"such":[47],"impacts":[48],"convolutional":[50,66,133],"energy":[55,76,128],"memory-systems":[58],"by":[59],"analyzing":[60],"structuring":[62],"datasets":[64],"networks,":[68],"space":[71],"bandwidth":[73],"requirements,":[74],"accesses":[80],"DDR":[82],"versus":[85],"3D-stacked":[86,110],"DRAM":[87,111],"future":[91],"direction":[92],"this":[94],"area.":[95],"Also,":[96],"one":[97],"possible":[98],"architectural":[99],"implementation":[100],"using":[101],"near-data":[103],"processing":[104],"capabilities":[105],"highly":[107],"parallel":[108],"heterogeneous":[109],"chips":[112],"Micron's":[114],"Hybrid":[115],"Memory":[116],"Cube":[117],"demonstrated":[119],"which":[120],"shows":[121],"improvement":[123],"above":[125],"90%":[126],"for":[130],"acceleration":[131],"networks.":[135]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
