{"id":"https://openalex.org/W2899604132","doi":"https://doi.org/10.1145/3232538","title":"An Approximation Algorithm for Threshold Voltage Optimization","display_name":"An Approximation Algorithm for Threshold Voltage Optimization","publication_year":2018,"publication_date":"2018-11-06","ids":{"openalex":"https://openalex.org/W2899604132","doi":"https://doi.org/10.1145/3232538","mag":"2899604132"},"language":"en","primary_location":{"id":"doi:10.1145/3232538","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3232538","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035842055","display_name":"Siad Daboul","orcid":"https://orcid.org/0000-0002-5864-9385"},"institutions":[{"id":"https://openalex.org/I135140700","display_name":"University of Bonn","ror":"https://ror.org/041nas322","country_code":"DE","type":"education","lineage":["https://openalex.org/I135140700"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Siad Daboul","raw_affiliation_strings":["University of Bonn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bonn, Germany","institution_ids":["https://openalex.org/I135140700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089221320","display_name":"Stephan Held","orcid":"https://orcid.org/0000-0003-2188-1559"},"institutions":[{"id":"https://openalex.org/I135140700","display_name":"University of Bonn","ror":"https://ror.org/041nas322","country_code":"DE","type":"education","lineage":["https://openalex.org/I135140700"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stephan Held","raw_affiliation_strings":["University of Bonn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bonn, Germany","institution_ids":["https://openalex.org/I135140700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028076811","display_name":"Jens Vygen","orcid":null},"institutions":[{"id":"https://openalex.org/I135140700","display_name":"University of Bonn","ror":"https://ror.org/041nas322","country_code":"DE","type":"education","lineage":["https://openalex.org/I135140700"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Vygen","raw_affiliation_strings":["University of Bonn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bonn, Germany","institution_ids":["https://openalex.org/I135140700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003771593","display_name":"Sonja Wittke","orcid":null},"institutions":[{"id":"https://openalex.org/I135140700","display_name":"University of Bonn","ror":"https://ror.org/041nas322","country_code":"DE","type":"education","lineage":["https://openalex.org/I135140700"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sonja Wittke","raw_affiliation_strings":["University of Bonn, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bonn, Germany","institution_ids":["https://openalex.org/I135140700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I135140700"],"apc_list":null,"apc_paid":null,"fwci":0.3788,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.6322741,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"23","issue":"6","first_page":"1","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.805198609828949},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6141632795333862},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.584882378578186},{"id":"https://openalex.org/keywords/timer","display_name":"Timer","score":0.5747008323669434},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5556808114051819},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5237340927124023},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.5235198140144348},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4870646297931671},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.47372832894325256},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.46551039814949036},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.4566582143306732},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4529900848865509},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3867795169353485},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37724801898002625},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.32888278365135193},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24104264378547668},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22908338904380798},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1714422106742859},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11023670434951782}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.805198609828949},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6141632795333862},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.584882378578186},{"id":"https://openalex.org/C2776633867","wikidata":"https://www.wikidata.org/wiki/Q186612","display_name":"Timer","level":3,"score":0.5747008323669434},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5556808114051819},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5237340927124023},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.5235198140144348},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4870646297931671},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.47372832894325256},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.46551039814949036},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.4566582143306732},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4529900848865509},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3867795169353485},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37724801898002625},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.32888278365135193},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24104264378547668},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22908338904380798},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1714422106742859},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11023670434951782},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3232538","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3232538","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1544515183","https://openalex.org/W1569550779","https://openalex.org/W1803276454","https://openalex.org/W1989540884","https://openalex.org/W1999291149","https://openalex.org/W2005653503","https://openalex.org/W2019179812","https://openalex.org/W2064600658","https://openalex.org/W2102726266","https://openalex.org/W2139411793","https://openalex.org/W2139899398","https://openalex.org/W2143698439","https://openalex.org/W2156878430","https://openalex.org/W2167416732","https://openalex.org/W2172629440","https://openalex.org/W2331641995","https://openalex.org/W2922092846","https://openalex.org/W3024745949","https://openalex.org/W3141605464"],"related_works":["https://openalex.org/W1987947034","https://openalex.org/W2380195243","https://openalex.org/W2130127169","https://openalex.org/W1999476393","https://openalex.org/W2551878898","https://openalex.org/W2207750882","https://openalex.org/W2018577544","https://openalex.org/W1921751656","https://openalex.org/W2121772322","https://openalex.org/W2084292592"],"abstract_inverted_index":{"We":[0,67],"present":[1],"a":[2,27],"primal-dual":[3],"approximation":[4],"algorithm":[5,40],"for":[6,54,59,96],"minimizing":[7],"the":[8,36,64,69,92],"leakage":[9,61,80,109],"power":[10,37,56,62,81,110],"of":[11,83,89,91,112],"an":[12,32,46],"integrated":[13],"circuit":[14],"by":[15],"assigning":[16],"gate":[17,97],"threshold":[18,100],"voltages.":[19],"While":[20],"most":[21,93],"existing":[22],"techniques":[23],"do":[24],"not":[25],"provide":[26],"performance":[28,71],"guarantee,":[29],"we":[30,107],"prove":[31],"upper":[33],"bound":[34],"on":[35,72,87],"consumption.":[38],"The":[39],"is":[41],"practical":[42,70],"and":[43,99],"works":[44],"with":[45],"industrial":[47],"sign-off":[48],"timer.":[49],"It":[50],"can":[51],"be":[52],"used":[53],"post-routing":[55],"reduction":[57],"or":[58],"optimizing":[60],"throughout":[63],"design":[65],"flow.":[66],"demonstrate":[68],"recent":[73],"microprocessor":[74],"units.":[75],"Our":[76],"implementation":[77],"obtains":[78],"significant":[79],"reductions":[82,111],"up":[84,113],"to":[85,114],"8%":[86],"top":[88],"one":[90],"successful":[94],"algorithms":[95],"sizing":[98],"voltage":[101],"optimization.":[102],"After":[103],"timing-aware":[104],"global":[105],"routing,":[106],"achieve":[108],"34%.":[115]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}