{"id":"https://openalex.org/W2905754513","doi":"https://doi.org/10.1145/3232195.3232213","title":"Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array","display_name":"Variability-Tolerant Memristor-based Ratioed Logic in Crossbar Array","publication_year":2018,"publication_date":"2018-07-17","ids":{"openalex":"https://openalex.org/W2905754513","doi":"https://doi.org/10.1145/3232195.3232213","mag":"2905754513"},"language":"en","primary_location":{"id":"doi:10.1145/3232195.3232213","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3232195.3232213","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hdl.handle.net/2117/130146","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103275760","display_name":"Manuel Escudero","orcid":"https://orcid.org/0000-0003-1323-4546"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"M. Escudero","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030851089","display_name":"Ioannis Vourkas","orcid":"https://orcid.org/0000-0002-7036-8092"},"institutions":[{"id":"https://openalex.org/I75778554","display_name":"Federico Santa Mar\u00eda Technical University","ror":"https://ror.org/05510vn56","country_code":"CL","type":"education","lineage":["https://openalex.org/I75778554"]}],"countries":["CL"],"is_corresponding":false,"raw_author_name":"I. Vourkas","raw_affiliation_strings":["Universidad T\u00e8cnica Federico Santa Mar\u00eda, Valpara\u00edso, Chile"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad T\u00e8cnica Federico Santa Mar\u00eda, Valpara\u00edso, Chile","institution_ids":["https://openalex.org/I75778554"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063332575","display_name":"Antonio Rubio","orcid":"https://orcid.org/0000-0003-1625-1472"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Rubio","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028715959","display_name":"Francesc Moll","orcid":"https://orcid.org/0000-0002-1290-3253"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"F. Moll","raw_affiliation_strings":["Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universitat Polit\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103275760"],"corresponding_institution_ids":["https://openalex.org/I9617848"],"apc_list":null,"apc_paid":null,"fwci":0.6545,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.72504136,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"13","last_page":"18"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.839756429195404},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.6974239945411682},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6558429002761841},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.6291907429695129},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6027447581291199},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5409337878227234},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.53493732213974},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5255531072616577},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.49304959177970886},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.48098742961883545},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47875991463661194},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4502970576286316},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3850313723087311},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34080713987350464},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.32556915283203125},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2883533835411072},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2002488374710083},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.19467738270759583},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.11791291832923889},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11230400204658508},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.10851559042930603},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09504890441894531}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.839756429195404},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.6974239945411682},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6558429002761841},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.6291907429695129},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6027447581291199},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5409337878227234},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.53493732213974},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5255531072616577},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.49304959177970886},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.48098742961883545},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47875991463661194},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4502970576286316},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3850313723087311},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34080713987350464},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.32556915283203125},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2883533835411072},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2002488374710083},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.19467738270759583},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.11791291832923889},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11230400204658508},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.10851559042930603},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09504890441894531},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3232195.3232213","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3232195.3232213","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures","raw_type":"proceedings-article"},{"id":"pmh:oai:upcommons.upc.edu:2117/130146","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/130146","pdf_url":null,"source":{"id":"https://openalex.org/S4377196262","display_name":"UPCommons institutional repository (Universitat Polit\u00e8cnica de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I9617848","host_organization_name":"Universitat Polit\u00e8cnica de Catalunya","host_organization_lineage":["https://openalex.org/I9617848"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:upcommons.upc.edu:2117/130146","is_oa":true,"landing_page_url":"https://hdl.handle.net/2117/130146","pdf_url":null,"source":{"id":"https://openalex.org/S4377196262","display_name":"UPCommons institutional repository (Universitat Polit\u00e8cnica de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I9617848","host_organization_name":"Universitat Polit\u00e8cnica de Catalunya","host_organization_lineage":["https://openalex.org/I9617848"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8600000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1970645895","https://openalex.org/W2004823737","https://openalex.org/W2112181056","https://openalex.org/W2119247813","https://openalex.org/W2162651880","https://openalex.org/W2329040051","https://openalex.org/W2487935967","https://openalex.org/W2516467421","https://openalex.org/W2588338741","https://openalex.org/W2626667124","https://openalex.org/W2738894409","https://openalex.org/W2770634378","https://openalex.org/W3098892068"],"related_works":["https://openalex.org/W3005999147","https://openalex.org/W3176428941","https://openalex.org/W3089883684","https://openalex.org/W4232634182","https://openalex.org/W4301187613","https://openalex.org/W2923038022","https://openalex.org/W3008646524","https://openalex.org/W4385624997","https://openalex.org/W2593506445","https://openalex.org/W1964133539"],"abstract_inverted_index":{"The":[0],"advent":[1],"of":[2,28,50,56,74,88,97,103,116,180],"the":[3,10,43,51,72,98,165,174,192],"first":[4],"TiO2-based":[5],"memristor":[6,57,175],"in":[7,42,71],"2008":[8],"revived":[9],"scientific":[11],"interest":[12],"both":[13,125],"from":[14],"academia":[15],"and":[16,59,63,101,106,109,127,154],"industry":[17],"for":[18,46,151],"this":[19,79],"device":[20,94,99,157,166],"technology,":[21],"with":[22,39,188],"several":[23],"emerging":[24],"applications":[25],"including":[26],"that":[27],"logic":[29,33,76,118,137,144,186,195],"circuits.":[30],"Several":[31],"memristive":[32,136,142],"families":[34],"have":[35],"been":[36],"proposed,":[37],"each":[38],"different":[40],"attributes,":[41],"current":[44],"quest":[45],"energy-efficient":[47],"computing":[48],"systems":[49],"future.":[52],"However,":[53],"limited":[54],"endurance":[55,167],"devices":[58],"variations":[60],"(both":[61],"cycle-to-cycle":[62],"device-to-device)":[64],"are":[65],"important":[66],"parameters":[67],"to":[68,112,124,156],"be":[69],"considered":[70],"evaluation":[73],"such":[75,184],"families.":[77],"In":[78],"work":[80,133],"we":[81,139,182],"build":[82],"upon":[83],"an":[84],"accurate":[85],"physics-based":[86],"model":[87],"a":[89,141,178],"bipolar":[90],"metal-oxide":[91],"resistive":[92],"RAM":[93],"(supporting":[95],"parasitics":[96],"structure":[100],"variability":[102,126],"switching":[104,173],"voltages":[105],"resistance":[107],"states)":[108],"use":[110],"it":[111,161],"show":[113],"how":[114],"performance":[115],"memristor-based":[117],"circuits":[119],"can":[120],"de":[121],"degraded":[122],"owing":[123],"state-drift":[128],"impact.":[129],"Based":[130],"on":[131,134,191],"previous":[132],"CMOS-like":[135],"circuits,":[138],"propose":[140],"ratioed":[143],"scheme,":[145],"which":[146],"is":[147],"crossbar-compatible,":[148],"i.e.":[149],"suitable":[150],"in-/near-memory":[152],"computing,":[153],"tolerant":[155],"variability,":[158],"while":[159],"also":[160],"does":[162],"not":[163,171],"affect":[164],"since":[168],"computations":[169],"do":[170],"involve":[172],"states.":[176],"As":[177],"figure":[179],"merit,":[181],"compare":[183],"new":[185],"scheme":[187],"MAGIC,":[189],"focusing":[190],"universal":[193],"NOR":[194],"gate.":[196]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2}],"updated_date":"2026-05-06T08:25:59.206177","created_date":"2019-01-01T00:00:00"}