{"id":"https://openalex.org/W2897993720","doi":"https://doi.org/10.1145/3207677.3278019","title":"An Architecture of FPGA-Based Controller on Automatic Control System for Test and Launch in Launch Site","display_name":"An Architecture of FPGA-Based Controller on Automatic Control System for Test and Launch in Launch Site","publication_year":2018,"publication_date":"2018-10-18","ids":{"openalex":"https://openalex.org/W2897993720","doi":"https://doi.org/10.1145/3207677.3278019","mag":"2897993720"},"language":"en","primary_location":{"id":"doi:10.1145/3207677.3278019","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3207677.3278019","pdf_url":null,"source":{"id":"https://openalex.org/S4306523741","display_name":"Proceedings of the 2nd International Conference on Computer Science and Application Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Conference on Computer Science and Application Engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110622720","display_name":"Litian Xiao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210144889","display_name":"Beijing Municipal Engineering Design and Research Institute (China)","ror":"https://ror.org/03x92hw77","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210144889"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Litian Xiao","raw_affiliation_strings":["Beijing Special Engineering Design and Research Institute, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Beijing Special Engineering Design and Research Institute, Beijing, China","institution_ids":["https://openalex.org/I4210144889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100774625","display_name":"Weiguo Wang","orcid":"https://orcid.org/0000-0002-8306-2658"},"institutions":[{"id":"https://openalex.org/I4210139507","display_name":"State Nuclear Power Technology Company (China)","ror":"https://ror.org/03pydjx38","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210139507"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiguo Wang","raw_affiliation_strings":["State Nuclear Power Automation System Engineering Company, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Nuclear Power Automation System Engineering Company, Shanghai, China","institution_ids":["https://openalex.org/I4210139507"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051453693","display_name":"Kewen Hou","orcid":null},"institutions":[{"id":"https://openalex.org/I4210144889","display_name":"Beijing Municipal Engineering Design and Research Institute (China)","ror":"https://ror.org/03x92hw77","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210144889"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kewen Hou","raw_affiliation_strings":["Beijing Special Engineering Design and Research Institute, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Beijing Special Engineering Design and Research Institute, Beijing, China","institution_ids":["https://openalex.org/I4210144889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100415393","display_name":"Mengyuan Li","orcid":"https://orcid.org/0000-0001-5526-3228"},"institutions":[{"id":"https://openalex.org/I4210144889","display_name":"Beijing Municipal Engineering Design and Research Institute (China)","ror":"https://ror.org/03x92hw77","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210144889"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mengyuan Li","raw_affiliation_strings":["Beijing Special Engineering Design and Research Institute, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Beijing Special Engineering Design and Research Institute, Beijing, China","institution_ids":["https://openalex.org/I4210144889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100455958","display_name":"Fei Wang","orcid":"https://orcid.org/0000-0003-3462-8472"},"institutions":[{"id":"https://openalex.org/I4210144889","display_name":"Beijing Municipal Engineering Design and Research Institute (China)","ror":"https://ror.org/03x92hw77","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210144889"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fei Wang","raw_affiliation_strings":["Beijing Special Engineering Design and Research Institute, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Beijing Special Engineering Design and Research Institute, Beijing, China","institution_ids":["https://openalex.org/I4210144889"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074514541","display_name":"Yuliang Li","orcid":"https://orcid.org/0000-0003-2189-6849"},"institutions":[{"id":"https://openalex.org/I4210144889","display_name":"Beijing Municipal Engineering Design and Research Institute (China)","ror":"https://ror.org/03x92hw77","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210144889"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuliang Li","raw_affiliation_strings":["Beijing Special Engineering Design and Research Institute, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Beijing Special Engineering Design and Research Institute, Beijing, China","institution_ids":["https://openalex.org/I4210144889"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5110622720"],"corresponding_institution_ids":["https://openalex.org/I4210144889"],"apc_list":null,"apc_paid":null,"fwci":0.6756,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63129973,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8591896295547485},{"id":"https://openalex.org/keywords/backplane","display_name":"Backplane","score":0.8371840715408325},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.638100266456604},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6139051914215088},{"id":"https://openalex.org/keywords/programmable-logic-controller","display_name":"Programmable logic controller","score":0.5838467478752136},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5838457942008972},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5406993627548218},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.5030824542045593},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.4702436029911041},{"id":"https://openalex.org/keywords/control-system","display_name":"Control system","score":0.46670910716056824},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44935983419418335},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4365021586418152},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2746974229812622},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10528329014778137},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.08502310514450073},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07911741733551025}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8591896295547485},{"id":"https://openalex.org/C134256836","wikidata":"https://www.wikidata.org/wiki/Q545913","display_name":"Backplane","level":2,"score":0.8371840715408325},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.638100266456604},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6139051914215088},{"id":"https://openalex.org/C37374048","wikidata":"https://www.wikidata.org/wiki/Q188674","display_name":"Programmable logic controller","level":2,"score":0.5838467478752136},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5838457942008972},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5406993627548218},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.5030824542045593},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.4702436029911041},{"id":"https://openalex.org/C17500928","wikidata":"https://www.wikidata.org/wiki/Q959968","display_name":"Control system","level":2,"score":0.46670910716056824},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44935983419418335},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4365021586418152},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2746974229812622},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10528329014778137},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.08502310514450073},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07911741733551025},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3207677.3278019","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3207677.3278019","pdf_url":null,"source":{"id":"https://openalex.org/S4306523741","display_name":"Proceedings of the 2nd International Conference on Computer Science and Application Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Conference on Computer Science and Application Engineering","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4000000059604645}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1585223597","https://openalex.org/W1598962305","https://openalex.org/W1623406585","https://openalex.org/W1972058531","https://openalex.org/W1976559050","https://openalex.org/W1981235707","https://openalex.org/W2020280139","https://openalex.org/W2047495915","https://openalex.org/W2061205755","https://openalex.org/W2095572349","https://openalex.org/W2105488231","https://openalex.org/W2144005171","https://openalex.org/W2291513633","https://openalex.org/W2305990993","https://openalex.org/W2331249723","https://openalex.org/W2382573330","https://openalex.org/W2490506697","https://openalex.org/W2520147245","https://openalex.org/W2600567833","https://openalex.org/W2607975804","https://openalex.org/W2745583171"],"related_works":["https://openalex.org/W2794067684","https://openalex.org/W2358591189","https://openalex.org/W616788921","https://openalex.org/W4391047221","https://openalex.org/W2183772682","https://openalex.org/W4206484832","https://openalex.org/W2041879832","https://openalex.org/W4391319798","https://openalex.org/W2536325749","https://openalex.org/W2477634289"],"abstract_inverted_index":{"Most1":[0],"FPGA":[1,18,121,154],"applications":[2],"in":[3,51,221],"control":[4,46,75],"systems":[5],"are":[6,48,84],"used":[7],"for":[8,172],"single":[9],"devices":[10],"and":[11,31,44,70,79,107,135,191,213],"equipment,":[12],"or":[13,181],"auxiliary":[14],"processing":[15],"systems.":[16],"Because":[17],"operation":[19],"has":[20,198,207],"the":[21,41,55,64,68,74,77,80,88,132,141,179,203,209,215,218,222],"characteristics":[22],"of":[23,40,66,73,101,114,124,165,217],"unchangeable":[24],"operating":[25],"logic,":[26,134],"it":[27],"possesses":[28],"higher":[29,60],"security":[30],"reliability":[32],"than":[33],"Programmable":[34],"Logic":[35,103],"Controller":[36],"(PLC).":[37],"The":[38,97,117,145,159,168],"objects":[39],"ground":[42],"test":[43],"launch":[45,53],"system":[47],"much":[49],"complex":[50],"space":[52],"site,":[54],"FPGA-based":[56,89,98],"controller":[57,91,99,197],"can":[58],"achieve":[59],"usage":[61],"requirements.":[62],"On":[63],"basis":[65],"analyzing":[67],"model":[69],"working":[71],"pattern":[72],"system,":[76],"architecture":[78],"concrete":[81],"implementation":[82],"scheme":[83,220],"proposed":[85,204],"to":[86,95,139,156,202],"develop":[87],"core":[90],"that":[92,149],"is":[93,120,137,148,162],"similar":[94],"PLC.":[96],"consists":[100,113],"General":[102],"Module":[104,110],"(GLM),":[105],"backplane":[106,169],"Rear":[108],"Transport":[109],"(RTM).":[111],"GLM":[112,173,190],"three":[115],"parts.":[116],"first":[118],"part":[119,147,161],"chip":[122,155],"composed":[123],"two":[125],"functions,":[126],"i.e.":[127],"one":[128],"function":[129],"mainly":[130],"completes":[131],"general":[133],"another":[136],"applied":[138],"implement":[140],"user":[142],"custom":[143],"functions.":[144,183],"second":[146],"universal":[150],"carrier":[151],"board":[152],"connects":[153],"I/O":[157,166],"interfaces.":[158,167],"third":[160],"multiple":[163,176],"types":[164],"provides":[170],"slots":[171],"connector":[174],"cascaded":[175],"GLMs":[177],"with":[178],"same":[180],"different":[182],"RTM":[184],"serves":[185],"as":[186],"an":[187],"interface":[188],"between":[189],"field":[192],"input/output":[193],"signals.":[194],"A":[195],"prototype":[196],"been":[199],"developed":[200],"according":[201],"architecture.":[205],"It":[206],"reached":[208],"corresponding":[210],"technical":[211,219],"specifications":[212],"verified":[214],"feasibility":[216],"paper.":[223]},"counts_by_year":[{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}