{"id":"https://openalex.org/W2884848538","doi":"https://doi.org/10.1145/3203217.3203279","title":"A prefetch-aware memory system for data access patterns in multimedia applications","display_name":"A prefetch-aware memory system for data access patterns in multimedia applications","publication_year":2018,"publication_date":"2018-05-08","ids":{"openalex":"https://openalex.org/W2884848538","doi":"https://doi.org/10.1145/3203217.3203279","mag":"2884848538"},"language":"en","primary_location":{"id":"doi:10.1145/3203217.3203279","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3203217.3203279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047454317","display_name":"Tareq A. Alawneh","orcid":"https://orcid.org/0000-0002-2400-1599"},"institutions":[{"id":"https://openalex.org/I4577782","display_name":"Technische Universit\u00e4t Berlin","ror":"https://ror.org/03v4gjf40","country_code":"DE","type":"education","lineage":["https://openalex.org/I4577782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tareq A. Alawneh","raw_affiliation_strings":["Technical University of Berlin, Berlin, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Berlin, Berlin, Germany","institution_ids":["https://openalex.org/I4577782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027045231","display_name":"Ahmed Elhossini","orcid":"https://orcid.org/0000-0001-7389-9473"},"institutions":[{"id":"https://openalex.org/I184834183","display_name":"Al-Azhar University","ror":"https://ror.org/05fnp1145","country_code":"EG","type":"education","lineage":["https://openalex.org/I184834183"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Ahmed Elhossini","raw_affiliation_strings":["Al Azhar University, Cairo, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Al Azhar University, Cairo, Egypt","institution_ids":["https://openalex.org/I184834183"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6609,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.61256422,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"78","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/instruction-prefetch","display_name":"Instruction prefetch","score":0.9502549171447754},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8786163330078125},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6135947704315186},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.6087403297424316},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.6047424674034119},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5919646620750427},{"id":"https://openalex.org/keywords/data-access","display_name":"Data access","score":0.5735202431678772},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5661150217056274},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5302340984344482},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.4929947555065155},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.48880311846733093},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4587858021259308},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.4383552372455597},{"id":"https://openalex.org/keywords/auxiliary-memory","display_name":"Auxiliary memory","score":0.4185486137866974},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.37048447132110596},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33746641874313354},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.33697402477264404},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3113980293273926},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3098847568035126},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.1857679784297943},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.11650693416595459}],"concepts":[{"id":"https://openalex.org/C133588205","wikidata":"https://www.wikidata.org/wiki/Q28455645","display_name":"Instruction prefetch","level":3,"score":0.9502549171447754},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8786163330078125},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6135947704315186},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.6087403297424316},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.6047424674034119},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5919646620750427},{"id":"https://openalex.org/C47487241","wikidata":"https://www.wikidata.org/wiki/Q5227230","display_name":"Data access","level":2,"score":0.5735202431678772},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5661150217056274},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5302340984344482},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.4929947555065155},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.48880311846733093},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4587858021259308},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4383552372455597},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.4185486137866974},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.37048447132110596},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33746641874313354},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.33697402477264404},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3113980293273926},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3098847568035126},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.1857679784297943},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.11650693416595459},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3203217.3203279","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3203217.3203279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.4300000071525574,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1609708832","https://openalex.org/W1978007292","https://openalex.org/W2082927749","https://openalex.org/W2102971092","https://openalex.org/W2115172404","https://openalex.org/W2147657366","https://openalex.org/W2158620667","https://openalex.org/W2165284728","https://openalex.org/W2165697076","https://openalex.org/W2294693415","https://openalex.org/W4205474951","https://openalex.org/W4234266590","https://openalex.org/W4247787189"],"related_works":["https://openalex.org/W3113336200","https://openalex.org/W2068131691","https://openalex.org/W2170496111","https://openalex.org/W3008068282","https://openalex.org/W2954676126","https://openalex.org/W3114998063","https://openalex.org/W2126827366","https://openalex.org/W1979982061","https://openalex.org/W2019238062","https://openalex.org/W2138825797"],"abstract_inverted_index":{"As":[0],"the":[1,14,32,102,108,115,133,138,141],"speed":[2],"gap":[3],"between":[4],"CPU":[5],"and":[6,54,65,90,113],"external":[7],"memory":[8,10,34,84,104,111,123],"widens,":[9],"latency":[11],"has":[12],"become":[13],"dominant":[15],"performance":[16,74],"bottleneck":[17],"in":[18,30,95,140],"modern":[19],"applications.":[20,97],"Closely":[21],"connected":[22],"are":[23,70],"caches":[24],"which":[25],"play":[26],"an":[27],"important":[28],"role":[29],"reducing":[31,101],"average":[33,103,122],"latency.":[35],"The":[36],"way":[37],"data":[38,50,67,92],"is":[39],"accessed":[40],"strongly":[41],"influences":[42],"cache":[43],"performance.":[44],"Numerous":[45],"multimedia":[46,96],"algorithms":[47],"operating":[48],"on":[49],"such":[51],"as":[52],"images":[53],"videos,":[55],"perform":[56],"processing":[57],"over":[58],"rectangular":[59],"regions":[60],"of":[61,110,128],"pixels.":[62],"If":[63],"this":[64],"other":[66],"access":[68,93,105,124],"patterns":[69,94],"properly":[71],"exploited,":[72],"significant":[73,121],"improvements":[75],"can":[76],"be":[77],"achieved.":[78],"This":[79],"paper":[80],"proposes":[81],"a":[82],"prefetch-aware":[83],"system":[85],"that":[86],"exploits":[87],"2D,":[88],"stride":[89],"sequential":[91],"It":[98],"aims":[99],"at":[100],"latency,":[106],"lowering":[107],"number":[109],"accesses":[112],"utilizing":[114,131],"bandwidth":[116],"efficiently.":[117],"Our":[118],"results":[119],"reveal":[120],"time":[125],"(AMAT)":[126],"reduction":[127],"21.2%":[129],"when":[130],"effectively":[132],"proposed":[134],"approach":[135],"compared":[136],"to":[137],"baseline":[139],"evaluated":[142],"workloads.":[143]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}