{"id":"https://openalex.org/W2808751340","doi":"https://doi.org/10.1145/3195970.3196008","title":"Closed yet open DRAM","display_name":"Closed yet open DRAM","publication_year":2018,"publication_date":"2018-06-19","ids":{"openalex":"https://openalex.org/W2808751340","doi":"https://doi.org/10.1145/3195970.3196008","mag":"2808751340"},"language":"en","primary_location":{"id":"doi:10.1145/3195970.3196008","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3195970.3196008","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 55th Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013984674","display_name":"Lavanya Subramanian","orcid":"https://orcid.org/0000-0001-9809-3361"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lavanya Subramanian","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074439216","display_name":"Kaushik Vaidyanathan","orcid":"https://orcid.org/0000-0002-2900-9186"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Vaidyanathan","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018185988","display_name":"Anant Nori","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anant Nori","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036799188","display_name":"Sreenivas Subramoney","orcid":"https://orcid.org/0000-0001-5372-0173"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sreenivas Subramoney","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016416631","display_name":"Tanay Karnik","orcid":"https://orcid.org/0000-0003-0072-1492"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tanay Karnik","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100371015","display_name":"Hong Wang","orcid":"https://orcid.org/0009-0008-2874-2168"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hong Wang","raw_affiliation_strings":["Intel Labs"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.2203,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.34189631,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8500663042068481},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8170852661132812},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6275814771652222},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.6238511800765991},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5156732797622681},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4087948203086853},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.394815593957901},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.30460578203201294},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.15664097666740417}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8500663042068481},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8170852661132812},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6275814771652222},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.6238511800765991},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5156732797622681},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4087948203086853},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.394815593957901},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.30460578203201294},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.15664097666740417}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3195970.3196008","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3195970.3196008","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 55th Annual Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W104390747","https://openalex.org/W1551993571","https://openalex.org/W1964316448","https://openalex.org/W1964858680","https://openalex.org/W1996212848","https://openalex.org/W2007929622","https://openalex.org/W2026517532","https://openalex.org/W2115172404","https://openalex.org/W2129991978","https://openalex.org/W2131780201","https://openalex.org/W2156292919","https://openalex.org/W2158620667","https://openalex.org/W2414926609","https://openalex.org/W3147974890","https://openalex.org/W4242052363"],"related_works":["https://openalex.org/W2595172197","https://openalex.org/W2084856301","https://openalex.org/W2127970246","https://openalex.org/W2154176871","https://openalex.org/W1607126780","https://openalex.org/W4401211593","https://openalex.org/W2900372418","https://openalex.org/W2097599071","https://openalex.org/W2475657675","https://openalex.org/W1644532256"],"abstract_inverted_index":{"DRAM":[0],"memory":[1],"access":[2,9],"is":[3,101],"a":[4,125],"critical":[5],"performance":[6,107],"bottleneck.":[7],"To":[8],"one":[10],"cache":[11],"block,":[12],"an":[13,64,105],"entire":[14],"row":[15],"needs":[16],"to":[17,46,72,103,121],"be":[18],"sensed":[19],"and":[20,27,37,44,62,69,77,79,82,89,97],"amplified,":[21],"data":[22],"restored":[23],"into":[24],"the":[25,28,35,74],"bitcells":[26],"bitlines":[29,36,78],"precharged,":[30],"incurring":[31],"high":[32],"latency.":[33],"Isolating":[34],"sense":[38,75,113],"amplifiers":[39,76],"after":[40],"activation":[41],"enables":[42],"reads":[43,81],"precharges":[45,83],"happen":[47],"in":[48,54,84],"parallel.":[49,85],"However,":[50],"there":[51],"are":[52],"challenges":[53,61],"achieving":[55],"this":[56],"isolation.":[57],"We":[58],"tackle":[59],"these":[60],"propose":[63],"effective":[65],"scheme,":[66],"simultaneous":[67,95],"read":[68,96],"precharge":[70,98],"(SRP),":[71],"isolate":[73],"serve":[80],"Our":[86],"detailed":[87],"architecture":[88],"circuit":[90],"simulations":[91],"demonstrate":[92],"that":[93],"our":[94],"(SRP)":[99],"mechanism":[100],"able":[102],"achieve":[104],"8.6%":[106],"benefit":[108],"over":[109,124],"baseline,":[110],"while":[111],"reducing":[112],"amplifier":[114],"idle":[115],"power":[116],"by":[117],"30%,":[118],"as":[119],"compared":[120],"prior":[122],"work,":[123],"wide":[126],"range":[127],"of":[128],"workloads.":[129]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}