{"id":"https://openalex.org/W2807017412","doi":"https://doi.org/10.1145/3194554.3194569","title":"A Framework Exploiting Process Variability to Improve Energy Efficiency in FPGA Applications","display_name":"A Framework Exploiting Process Variability to Improve Energy Efficiency in FPGA Applications","publication_year":2018,"publication_date":"2018-05-30","ids":{"openalex":"https://openalex.org/W2807017412","doi":"https://doi.org/10.1145/3194554.3194569","mag":"2807017412"},"language":"en","primary_location":{"id":"doi:10.1145/3194554.3194569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3194554.3194569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060953706","display_name":"Konstantinos Maragos","orcid":"https://orcid.org/0000-0001-7684-1111"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Konstantinos Maragos","raw_affiliation_strings":["National Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053524294","display_name":"George Lentaris","orcid":"https://orcid.org/0000-0003-1664-8648"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Lentaris","raw_affiliation_strings":["National Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079245518","display_name":"Ioannis Stratakos","orcid":"https://orcid.org/0000-0002-1103-8202"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Ioannis Stratakos","raw_affiliation_strings":["National Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["National Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":1.9482,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.84653656,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7662133574485779},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7085035443305969},{"id":"https://openalex.org/keywords/guard","display_name":"Guard (computer science)","score":0.5554085969924927},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5476930141448975},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5322582125663757},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.529310941696167},{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.4638398289680481},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.46081963181495667},{"id":"https://openalex.org/keywords/personalization","display_name":"Personalization","score":0.4445402920246124},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4272821247577667},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3922922909259796},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1749180257320404},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15119367837905884}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7662133574485779},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7085035443305969},{"id":"https://openalex.org/C141141315","wikidata":"https://www.wikidata.org/wiki/Q2379942","display_name":"Guard (computer science)","level":2,"score":0.5554085969924927},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5476930141448975},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5322582125663757},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.529310941696167},{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.4638398289680481},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.46081963181495667},{"id":"https://openalex.org/C183003079","wikidata":"https://www.wikidata.org/wiki/Q1000371","display_name":"Personalization","level":2,"score":0.4445402920246124},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4272821247577667},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3922922909259796},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1749180257320404},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15119367837905884},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3194554.3194569","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3194554.3194569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1978172953","https://openalex.org/W1986633635","https://openalex.org/W2005671831","https://openalex.org/W2045704975","https://openalex.org/W2097683623","https://openalex.org/W2111515250","https://openalex.org/W2140680235","https://openalex.org/W2488909055","https://openalex.org/W2525415380","https://openalex.org/W2612881234"],"related_works":["https://openalex.org/W2347486132","https://openalex.org/W2316789606","https://openalex.org/W2109940557","https://openalex.org/W2350340797","https://openalex.org/W1967088250","https://openalex.org/W4293224283","https://openalex.org/W2466832359","https://openalex.org/W2950501077","https://openalex.org/W2368601041","https://openalex.org/W2079984045"],"abstract_inverted_index":{"As":[0],"technology":[1],"node":[2],"scales-down":[3],"and":[4,81,85,126],"process":[5,53],"variability":[6,54,72],"increases,":[7],"the":[8,44,50,75,90,113,124,135],"vendors":[9],"impose":[10],"even":[11],"more":[12,61],"conservative":[13],"guard-bands":[14],"to":[15,31,59,88,118,142],"prevent":[16],"potential":[17],"malfunction":[18],"of":[19,28,52,78,93,101,129],"their":[20],"microchips.":[21],"However,":[22],"this":[23],"approach":[24],"introduces":[25],"considerable":[26],"amounts":[27],"unexploited":[29],"performance":[30,102,125],"individual":[32],"chips,":[33],"which":[34],"can":[35],"be":[36],"harvested":[37],"by":[38,133],"developing":[39],"novel":[40],"customization":[41],"tools.":[42],"In":[43],"current":[45],"work,":[46],"we":[47,139],"focus":[48],"on":[49,106],"exploitation":[51],"in":[55],"modern":[56],"FPGA":[57],"chips":[58,80],"provide":[60],"energy":[62,76],"efficient":[63,137],"solutions.":[64],"We":[65],"propose":[66],"a":[67,98],"framework":[68,115],"that":[69,112],"i)":[70],"generates":[71],"maps":[73],"characterizing":[74],"efficiency":[77],"commercial":[79],"ii)":[82],"combines":[83],"voltage":[84],"frequency":[86],"scaling":[87],"limit":[89],"power":[91,120,145],"dissipation":[92],"any":[94],"given":[95,99],"design":[96],"for":[97],"set":[100],"constraints.":[103],"Experimental":[104],"results":[105],"Zynq":[107],"XC7Z020":[108],"28nm":[109],"FPGAs":[110],"show":[111],"developed":[114],"achieves":[116],"up":[117,141],"28.3%":[119],"reduction":[121],"while":[122],"maintaining":[123],"functional":[127],"integrity":[128],"realistic":[130],"benchmarks.":[131],"Moreover,":[132],"selecting":[134],"most":[136],"chip,":[138],"achieve":[140],"5.1%":[143],"additional":[144],"savings.":[146]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
