{"id":"https://openalex.org/W4239270890","doi":"https://doi.org/10.1145/318013.318090","title":"Hierarchial global wiring for custom chip design","display_name":"Hierarchial global wiring for custom chip design","publication_year":1986,"publication_date":"1986-01-01","ids":{"openalex":"https://openalex.org/W4239270890","doi":"https://doi.org/10.1145/318013.318090"},"language":"en","primary_location":{"id":"doi:10.1145/318013.318090","is_oa":true,"landing_page_url":"https://doi.org/10.1145/318013.318090","pdf_url":"https://dl.acm.org/doi/pdf/10.5555/318013.318090","source":{"id":"https://openalex.org/S4363608963","display_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation - DAC '86","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation  - DAC '86","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://dl.acm.org/doi/pdf/10.5555/318013.318090","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034135621","display_name":"W. K. Luk","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"W. K. Luk","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044679772","display_name":"D. T. Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. T. Tang","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091834602","display_name":"C. K. Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. K. Wong","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5034135621"],"corresponding_institution_ids":["https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.5853211,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"481","last_page":"489"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9608493447303772},{"id":"https://openalex.org/keywords/slicing","display_name":"Slicing","score":0.8003830313682556},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.7878998517990112},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.7669215798377991},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7117514610290527},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.5487495064735413},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.529533326625824},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5192780494689941},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5084006190299988},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4812852740287781},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4789438843727112},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.45843181014060974},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.45502880215644836},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4507173001766205},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4417306184768677},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.21584007143974304},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21332916617393494},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15818831324577332},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.1517108678817749},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11288294196128845}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9608493447303772},{"id":"https://openalex.org/C2776190703","wikidata":"https://www.wikidata.org/wiki/Q488148","display_name":"Slicing","level":2,"score":0.8003830313682556},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.7878998517990112},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.7669215798377991},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7117514610290527},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.5487495064735413},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.529533326625824},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5192780494689941},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5084006190299988},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4812852740287781},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4789438843727112},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.45843181014060974},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.45502880215644836},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4507173001766205},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4417306184768677},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.21584007143974304},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21332916617393494},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15818831324577332},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.1517108678817749},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11288294196128845},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/318013.318090","is_oa":true,"landing_page_url":"https://doi.org/10.1145/318013.318090","pdf_url":"https://dl.acm.org/doi/pdf/10.5555/318013.318090","source":{"id":"https://openalex.org/S4363608963","display_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation - DAC '86","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation  - DAC '86","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/318013.318090","is_oa":true,"landing_page_url":"https://doi.org/10.1145/318013.318090","pdf_url":"https://dl.acm.org/doi/pdf/10.5555/318013.318090","source":{"id":"https://openalex.org/S4363608963","display_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation - DAC '86","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation  - DAC '86","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4239270890.pdf","grobid_xml":"https://content.openalex.org/works/W4239270890.grobid-xml"},"referenced_works_count":9,"referenced_works":["https://openalex.org/W1655990431","https://openalex.org/W1967860513","https://openalex.org/W1970008974","https://openalex.org/W1975290397","https://openalex.org/W1979569488","https://openalex.org/W2004469113","https://openalex.org/W2020498688","https://openalex.org/W4240309467","https://openalex.org/W4249752314"],"related_works":["https://openalex.org/W2157271968","https://openalex.org/W2158448234","https://openalex.org/W1523582517","https://openalex.org/W2781601456","https://openalex.org/W3010631755","https://openalex.org/W1984375234","https://openalex.org/W2115502122","https://openalex.org/W2138401961","https://openalex.org/W2353155791","https://openalex.org/W2109972882"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,8,44,52,61,72,82,139],"global":[3,20],"wiring":[4,21],"algorithm":[5,48,97,114],"used":[6,125],"in":[7,40,118,144,149,155],"top-down":[9],"physical":[10],"design":[11],"environment,":[12],"i.e.":[13],"macros":[14,31,106,166],"are":[15,26],"laid":[16],"out":[17],"only":[18],"after":[19],"is":[22,39,49,58,68,98,102],"done,":[23],"and":[24,77,107,122,152,167,170],"wires":[25],"allowed":[27],"to":[28],"pass":[29],"through":[30,60],"(wiring-through":[32],"model).":[33],"The":[34,47,55,113],"floorplan":[35],"of":[36,43,63,74,87,94,105,111],"the":[37,41,66,88,90,95,103,109,119,133,171],"chip":[38,128],"form":[42],"slicing":[45,84],"structure.":[46],"based":[50],"on":[51],"hierarchical":[53,134],"scheme.":[54],"final":[56],"result":[57],"obtained":[59],"series":[62],"refinement":[64],"as":[65],"problem":[67],"recursively":[69],"decomposed":[70],"into":[71],"set":[73],"small-sized":[75],"problems":[76],"then":[78],"solved":[79],"efficiently.":[80],"Given":[81],"balanced":[83],"tree":[85],"representation":[86],"floorplan,":[89],"worst-case":[91],"running":[92],"time":[93],"overall":[96],"O(MN),":[99],"where":[100],"M":[101],"number":[104,110],"N":[108],"nets.":[112],"has":[115,123],"been":[116,124],"implemented":[117],"C":[120],"language":[121],"for":[126,161,176],"actual":[127],"design.":[129],"Experiments":[130],"showed":[131],"that":[132],"router":[135,143],"performs":[136],"better":[137],"than":[138],"flat":[140],"maze":[141],"type":[142],"wireability":[145],"handling,":[146],"equally":[147],"well":[148],"wire":[150],"length,":[151],"much":[153],"faster":[154],"run-time":[156],"(at":[157],"least":[158],"10":[159],"times":[160],"an":[162],"example":[163],"with":[164],"100":[165],"1000":[168],"nets,":[169],"gap":[172],"being":[173],"even":[174],"larger":[175],"bigger":[177],"sized":[178],"problems).":[179]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}