{"id":"https://openalex.org/W2788964471","doi":"https://doi.org/10.1145/3174243.3174993","title":"FPGAs in the Datacenters","display_name":"FPGAs in the Datacenters","publication_year":2018,"publication_date":"2018-02-15","ids":{"openalex":"https://openalex.org/W2788964471","doi":"https://doi.org/10.1145/3174243.3174993","mag":"2788964471"},"language":"en","primary_location":{"id":"doi:10.1145/3174243.3174993","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174993","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003247411","display_name":"Mikhail Asiatici","orcid":"https://orcid.org/0000-0002-8050-0042"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Mikhail Asiatici","raw_affiliation_strings":["\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039295095","display_name":"Damian Maiorano","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Damian Maiorano","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020575991","display_name":"Paolo Ienne","orcid":"https://orcid.org/0000-0002-6142-7345"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Paolo Ienne","raw_affiliation_strings":["\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne (EPFL), Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5003247411"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02231431,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"294","last_page":"294"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7896585464477539},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.715545117855072},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.5854083299636841},{"id":"https://openalex.org/keywords/xeon-phi","display_name":"Xeon Phi","score":0.526479959487915},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.524639904499054},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.5117425918579102},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.42413991689682007},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3578795790672302},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32148975133895874}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7896585464477539},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.715545117855072},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.5854083299636841},{"id":"https://openalex.org/C96972482","wikidata":"https://www.wikidata.org/wiki/Q1049168","display_name":"Xeon Phi","level":2,"score":0.526479959487915},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.524639904499054},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.5117425918579102},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.42413991689682007},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3578795790672302},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32148975133895874}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3174243.3174993","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174993","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2475524688","https://openalex.org/W2739740241","https://openalex.org/W2085105049","https://openalex.org/W2592417500","https://openalex.org/W1974923383","https://openalex.org/W2526069705","https://openalex.org/W2024016913","https://openalex.org/W2019153376","https://openalex.org/W2796552083","https://openalex.org/W2022666014"],"abstract_inverted_index":{"String":[0,52],"sorting":[1,20,76,158],"is":[2,29,33,70],"an":[3],"important":[4],"part":[5],"of":[6,21,100,107,132,159],"database":[7],"and":[8,31,156,189],"MapReduce":[9],"applications;":[10],"however,":[11],"it":[12,32],"has":[13],"not":[14],"been":[15,43],"studied":[16],"as":[17,19],"extensively":[18],"fixed-length":[22],"keys.":[23],"Handling":[24],"variable-length":[25],"keys":[26],"in":[27],"hardware":[28],"challenging":[30],"no":[34,37],"surprise":[35],"that":[36],"string":[38,75],"sorters":[39],"on":[40,56,72,92,164,184],"FPGA":[41],"have":[42],"proposed":[44],"yet.":[45],"We":[46,167],"present":[47],"Parallel":[48],"Hybrid":[49],"Super":[50],"Scalar":[51],"Sample":[53],"Sort":[54],"(pHS5)":[55],"Intel":[57,117],"HARPv2,":[58],"a":[59,64,115],"heterogeneous":[60],"CPU-FPGA":[61],"system":[62],"with":[63,87,140],"server-grade":[65],"multi-core":[66,79],"CPU.":[67,166],"Our":[68],"pHS5":[69],"based":[71],"the":[73,93,101,128,141,146,151,157,160,165,169,178,185],"state-of-the-art":[74],"algorithm":[77,171],"for":[78,144],"shared":[80],"memory":[81],"CPUs,":[82],"pS5,":[83],"which":[84],"we":[85,126],"extended":[86,127],"multiple":[88],"processing":[89,145],"elements":[90],"(PEs)":[91],"FPGA.":[94],"Each":[95],"PE":[96],"accelerates":[97],"one":[98],"instance":[99],"most":[102],"effectively":[103],"parallelizable":[104],"dominant":[105],"kernel":[106],"pS5":[108,133],"by":[109,172,190],"up":[110,173,191],"to":[111,114,134,138,174,177,192],"33%":[112],"compared":[113,176],"single":[116],"Xeon":[118,187],"Broadwell":[119],"core":[120],"running":[121,183],"at":[122,194],"3.4":[123],"GHz.":[124],"Furthermore,":[125],"job":[129],"scheduling":[130],"mechanism":[131],"enable":[135],"our":[136],"PEs":[137],"compete":[139],"CPU":[142],"cores":[143],"accelerable":[147],"kernel,":[148],"while":[149],"retaining":[150],"complex":[152],"high-level":[153],"control":[154],"flow":[155],"smaller":[161],"data":[162],"sets":[163],"accelerate":[168],"whole":[170],"10%":[175],"28":[179],"thread":[180,196],"software":[181],"baseline":[182],"14-core":[186],"processor":[188],"36%":[193],"lower":[195],"counts.":[197]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}