{"id":"https://openalex.org/W2794144604","doi":"https://doi.org/10.1145/3174243.3174984","title":"Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA","display_name":"Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA","publication_year":2018,"publication_date":"2018-02-15","ids":{"openalex":"https://openalex.org/W2794144604","doi":"https://doi.org/10.1145/3174243.3174984","mag":"2794144604"},"language":"en","primary_location":{"id":"doi:10.1145/3174243.3174984","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005147311","display_name":"Daisuke Suzuki","orcid":"https://orcid.org/0000-0002-8329-5734"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Daisuke Suzuki","raw_affiliation_strings":["Tohoku University, Sendai, Japan"],"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062434040","display_name":"Takahiro Hanyu","orcid":"https://orcid.org/0000-0002-4397-8290"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takahiro Hanyu","raw_affiliation_strings":["Tohoku University, Sendai, Japan"],"affiliations":[{"raw_affiliation_string":"Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5005147311"],"corresponding_institution_ids":["https://openalex.org/I201537933"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02687397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"291"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.8787902593612671},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6809519529342651},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.678027868270874},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6727515459060669},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.5772980451583862},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.574145495891571},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5329058766365051},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4962385296821594},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42562437057495117},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.41105684638023376},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.397115021944046},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35379135608673096},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15172290802001953},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.12683555483818054},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.121304452419281}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.8787902593612671},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6809519529342651},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.678027868270874},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6727515459060669},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.5772980451583862},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.574145495891571},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5329058766365051},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4962385296821594},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42562437057495117},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.41105684638023376},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.397115021944046},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35379135608673096},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15172290802001953},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.12683555483818054},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.121304452419281},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3174243.3174984","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2131696304","https://openalex.org/W2120398954","https://openalex.org/W2807211731","https://openalex.org/W2805075728","https://openalex.org/W2773448237","https://openalex.org/W2374017528","https://openalex.org/W2188598220","https://openalex.org/W4285503609"],"abstract_inverted_index":{"Nonvolatile":[0],"FPGAs":[1],"(NV-FPGAs)":[2],"have":[3],"a":[4,56,108],"potential":[5],"advantage":[6],"to":[7,31,43,104,183,221,233],"eliminate":[8],"wasted":[9],"standby":[10],"power":[11,74,102,142,189,212],"which":[12,185],"is":[13,76,81,125,144,155,181,195,206],"increasingly":[14],"serious":[15,109],"in":[16,85,165,187],"recent":[17],"standard":[18,34],"SRAM-based":[19,35,224],"FPGAs.":[20,36],"However,":[21],"functionality":[22],"of":[23,33,87,161,175,211,216,223,236],"the":[24,82,98,113,118,122,129,135,150,166,173,193],"conventional":[25],"NV-FPGAs":[26],"are":[27,227],"not":[28,49],"sufficient":[29],"compared":[30,220],"that":[32,67],"For":[37],"example,":[38],"an":[39],"effective":[40],"circuit":[41,66,226],"structure":[42],"perform":[44,69,105],"shift-register":[45],"(SR)":[46],"function":[47,71,107],"has":[48],"been":[50],"proposed":[51,167],"yet.":[52],"In":[53,170,208],"this":[54,148,171],"paper,":[55],"magnetic":[57],"tunnel":[58],"junction":[59],"(MTJ)":[60],"based":[61],"nonvolatile":[62],"lookup":[63],"table":[64],"(NV-LUT)":[65],"can":[68],"SR":[70,106,136],"with":[72],"low":[73],"consumption":[75,103,143],"proposed.":[77],"The":[78,229],"MTJ":[79,123],"device":[80,124],"best":[83],"candidate":[84],"terms":[86],"virtually":[88],"unlimited":[89],"endurance,":[90],"CMOS":[91],"compatibility,":[92],"and":[93,127,200,214,242],"3D":[94],"stacking":[95],"capability.":[96],"On":[97],"other":[99],"hand,":[100],"large":[101,126,141],"design":[110],"issue":[111],"for":[112,121,152],"MTJ-based":[114],"NV-LUT":[115],"circuit.":[116,169],"Since":[117],"write":[119,201],"current":[120],"all":[128],"data":[130,163,176],"must":[131],"be":[132],"updated":[133],"after":[134],"operation":[137],"using":[138],"CMOS-oriented":[139],"method,":[140],"indispensable.":[145],"To":[146],"overcome":[147],"issue,":[149],"address":[151],"read/write":[153],"access":[154],"incremented":[156],"at":[157],"each":[158],"cycle":[159],"instead":[160],"direct":[162],"shifting":[164],"LUT":[168,225],"way,":[172],"number":[174],"update":[177],"per":[178],"1-bit":[179],"shift":[180],"minimized":[182],"one,":[184],"results":[186],"great":[188],"saving.":[190],"Moreover,":[191],"since":[192],"selector":[194],"shared":[196],"both":[197],"read":[198],"(logic)":[199],"operation,":[202],"its":[203],"hardware":[204],"cost":[205],"small.":[207],"fact,":[209],"99%":[210],"reduction":[213,219],"52%":[215],"transistor":[217],"counts":[218],"those":[222],"performed.":[228],"authors":[230],"would":[231],"like":[232],"acknowledge":[234],"ImPACT":[235],"CSTI,":[237],"CIES":[238],"consortium":[239],"program,":[240],"JST-OPERA,":[241],"JSPS":[243],"KAKENHI":[244],"Grant":[245],"No.":[246],"17H06093.":[247]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}