{"id":"https://openalex.org/W2788827686","doi":"https://doi.org/10.1145/3174243.3174978","title":"DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation","display_name":"DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation","publication_year":2018,"publication_date":"2018-02-15","ids":{"openalex":"https://openalex.org/W2788827686","doi":"https://doi.org/10.1145/3174243.3174978","mag":"2788827686"},"language":"en","primary_location":{"id":"doi:10.1145/3174243.3174978","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102779166","display_name":"Gai Liu","orcid":"https://orcid.org/0000-0001-8538-686X"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Gai Liu","raw_affiliation_strings":["Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053419294","display_name":"Ecenur Ustun","orcid":"https://orcid.org/0000-0001-6546-1367"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ecenur Ustun","raw_affiliation_strings":["Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032824854","display_name":"Shaojie Xiang","orcid":"https://orcid.org/0000-0002-6901-8837"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shaojie Xiang","raw_affiliation_strings":["Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052203980","display_name":"Chang Xu","orcid":"https://orcid.org/0000-0002-6299-4704"},"institutions":[{"id":"https://openalex.org/I4210126794","display_name":"IBM Research (China)","ror":"https://ror.org/02yg1pf55","country_code":"CN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126794"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chang Xu","raw_affiliation_strings":["IBM Research, China, Beijing, China"],"affiliations":[{"raw_affiliation_string":"IBM Research, China, Beijing, China","institution_ids":["https://openalex.org/I4210126794"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023468643","display_name":"Guojie Luo","orcid":"https://orcid.org/0000-0003-4932-3655"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guojie Luo","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037210004","display_name":"Zhiru Zhang","orcid":"https://orcid.org/0000-0002-0778-0308"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhiru Zhang","raw_affiliation_strings":["Cornell University, Ithaca, NY, USA"],"affiliations":[{"raw_affiliation_string":"Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5102779166"],"corresponding_institution_ids":["https://openalex.org/I205783295"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.01360017,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"290","last_page":"290"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/extensibility","display_name":"Extensibility","score":0.8206014633178711},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8151102066040039},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7207724452018738},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5673458576202393},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5232412219047546},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.521914005279541},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5156391859054565},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5112450122833252},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.47977763414382935},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.4761674106121063},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.470855176448822},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4273519217967987},{"id":"https://openalex.org/keywords/user-interface","display_name":"User interface","score":0.4147414565086365},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21577373147010803},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17356282472610474}],"concepts":[{"id":"https://openalex.org/C32833848","wikidata":"https://www.wikidata.org/wiki/Q4115054","display_name":"Extensibility","level":2,"score":0.8206014633178711},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8151102066040039},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7207724452018738},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5673458576202393},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5232412219047546},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.521914005279541},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5156391859054565},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5112450122833252},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.47977763414382935},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.4761674106121063},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.470855176448822},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4273519217967987},{"id":"https://openalex.org/C89505385","wikidata":"https://www.wikidata.org/wiki/Q47146","display_name":"User interface","level":2,"score":0.4147414565086365},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21577373147010803},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17356282472610474},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3174243.3174978","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3174243.3174978","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1948607442","https://openalex.org/W3004004161","https://openalex.org/W2044615423","https://openalex.org/W4247766898","https://openalex.org/W4244765761","https://openalex.org/W3042858012","https://openalex.org/W2031109708","https://openalex.org/W2996372837","https://openalex.org/W3173352547","https://openalex.org/W1975701649"],"abstract_inverted_index":{"Mainstream":[0],"FPGA":[1,59,138],"tools":[2,64],"contain":[3],"an":[4,51,66],"extensive":[5],"set":[6],"of":[7,68,93,117,126],"user-controlled":[8],"compilation":[9,22],"options":[10],"and":[11,23,61,124,142],"internal":[12],"optimization":[13,24,136],"strategies":[14],"that":[15,31,83],"significantly":[16],"impact":[17],"the":[18,89,94,108,122],"design":[19,29,62,115],"quality.":[20],"These":[21],"parameters":[25],"create":[26],"a":[27,42,80],"complex":[28],"space":[30],"human":[32],"designers":[33],"may":[34],"not":[35],"be":[36],"able":[37],"to":[38,87,103,111,114],"effectively":[39],"explore":[40],"in":[41],"time-efficient":[43],"manner.":[44],"In":[45],"this":[46],"work":[47],"we":[48],"describe":[49],"DATuner,":[50],"open-source":[52],"extensible":[53],"distributed":[54,81],"autotuning":[55,143],"framework":[56],"for":[57,79,101,137],"optimizing":[58],"designs":[60],"automation":[63],"using":[65,128],"ensemble":[67],"search":[69],"techniques":[70],"managed":[71],"by":[72],"multi-armed":[73],"bandit":[74],"algorithms.":[75],"DATuner":[76,97,113,127],"is":[77],"designed":[78],"environment":[82],"uses":[84],"parallel":[85],"searches":[86],"amortize":[88],"significant":[90],"runtime":[91],"overhead":[92],"CAD":[95],"tools.":[96],"provides":[98],"convenient":[99],"interface":[100],"extension":[102],"user-supplied":[104],"tools,":[105],"which":[106,132],"enables":[107],"end":[109],"users":[110],"apply":[112],"tools/flows":[116],"their":[118],"interest.":[119],"We":[120],"demonstrate":[121],"effectiveness":[123],"extensibility":[125],"three":[129],"case":[130],"studies,":[131],"include":[133],"clock":[134],"frequency":[135],"compilation,":[139],"fixed-point":[140],"optimization,":[141],"logic":[144],"synthesis":[145],"transformations.":[146]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}