{"id":"https://openalex.org/W2771713864","doi":"https://doi.org/10.1145/3151758","title":"Fast and Cycle-Accurate Emulation of Large-Scale Networks-on-Chip Using a Single FPGA","display_name":"Fast and Cycle-Accurate Emulation of Large-Scale Networks-on-Chip Using a Single FPGA","publication_year":2017,"publication_date":"2017-12-13","ids":{"openalex":"https://openalex.org/W2771713864","doi":"https://doi.org/10.1145/3151758","mag":"2771713864"},"language":"en","primary_location":{"id":"doi:10.1145/3151758","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3151758","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026757519","display_name":"Thiem Van Chu","orcid":"https://orcid.org/0000-0002-2003-2574"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Thiem Van Chu","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101424734","display_name":"Shimpei Sato","orcid":"https://orcid.org/0000-0003-0292-1391"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shimpei Sato","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010523030","display_name":"Kenji Kise","orcid":"https://orcid.org/0000-0002-3003-4872"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kenji Kise","raw_affiliation_strings":["Tokyo Institute of Technology, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Tokyo, Japan","institution_ids":["https://openalex.org/I114531698"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I114531698"],"apc_list":null,"apc_paid":null,"fwci":1.1973,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.84116539,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"10","issue":"4","first_page":"1","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.8631994128227234},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8547630310058594},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7143794298171997},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6052122116088867},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.5741807222366333},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.5715172290802002},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5039281249046326},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4337523877620697},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33130693435668945},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17593702673912048}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.8631994128227234},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8547630310058594},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7143794298171997},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6052122116088867},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.5741807222366333},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.5715172290802002},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5039281249046326},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4337523877620697},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33130693435668945},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17593702673912048},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3151758","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3151758","pdf_url":null,"source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7132940013","display_name":"\uff26\uff30\uff27\uff21\u3092\u7528\u3044\u305f\u6b63\u78ba\u3067\u9ad8\u901f\u306a\u30e1\u30cb\u30fc\u30b3\u30a2\u30a8\u30df\u30e5\u30ec\u30fc\u30b7\u30e7\u30f3","funder_award_id":"17J09956","funder_id":"https://openalex.org/F4320334764","funder_display_name":"Japan Society for the Promotion of Science"},{"id":"https://openalex.org/G7525915324","display_name":"Research on High-speed Emulation of Large Scale Many-core Processors","funder_award_id":"16H02794","funder_id":"https://openalex.org/F4320334764","funder_display_name":"Japan Society for the Promotion of Science"}],"funders":[{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W1550442038","https://openalex.org/W1651994298","https://openalex.org/W1981663184","https://openalex.org/W2016465432","https://openalex.org/W2066339098","https://openalex.org/W2074504559","https://openalex.org/W2095595057","https://openalex.org/W2099917528","https://openalex.org/W2103127274","https://openalex.org/W2112678088","https://openalex.org/W2113235308","https://openalex.org/W2118187287","https://openalex.org/W2118231264","https://openalex.org/W2122900653","https://openalex.org/W2123086052","https://openalex.org/W2124463612","https://openalex.org/W2128258670","https://openalex.org/W2134470641","https://openalex.org/W2134736689","https://openalex.org/W2135218079","https://openalex.org/W2137385009","https://openalex.org/W2138146350","https://openalex.org/W2142127152","https://openalex.org/W2147657366","https://openalex.org/W2151925011","https://openalex.org/W2155008271","https://openalex.org/W2157225945","https://openalex.org/W2161755212","https://openalex.org/W2509453741","https://openalex.org/W2519594939","https://openalex.org/W2526108948","https://openalex.org/W2752853835","https://openalex.org/W2962841716"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2103996454","https://openalex.org/W3029775214","https://openalex.org/W2390650884","https://openalex.org/W2093057572","https://openalex.org/W2129151116","https://openalex.org/W2110651346","https://openalex.org/W2001552871","https://openalex.org/W1974143443","https://openalex.org/W2122279357"],"abstract_inverted_index":{"Modeling":[0],"and":[1,9,79,95,108,178,187,212,219,259,267,282,293],"simulation/emulation":[2],"play":[3],"a":[4,74,120,129,132,144,157,160,207,251,260,278],"major":[5],"role":[6],"in":[7,45],"research":[8],"development":[10],"of":[11,33,77,84,111,117,147,163,216,234,299,312],"novel":[12,145],"Networks-on-Chip":[13],"(NoCs).":[14],"However,":[15],"conventional":[16],"software":[17],"simulators":[18],"are":[19,152],"so":[20],"slow":[21],"that":[22,196,230,238],"studying":[23],"NoCs":[24,56,66,112,221],"for":[25,106,155,174],"emerging":[26],"many-core":[27],"systems":[28],"with":[29,113,222,254,263],"hundreds":[30],"to":[31,58,115,127],"thousands":[32,116],"cores":[34],"is":[35,191],"challenging.":[36],"State-of-the-art":[37],"FPGA-based":[38],"NoC":[39,49,130,208,237,253,262,305],"emulators":[40],"have":[41],"shown":[42],"great":[43],"potential":[44],"speeding":[46],"up":[47,114],"the":[48,59,82,89,99,167,183,202,214,232,235,245,300,309],"simulation,":[50],"but":[51],"they":[52],"cannot":[53],"emulate":[54,128],"large-scale":[55,65],"due":[57],"FPGA":[60,137,168,246],"capacity":[61,169],"constraints.":[62,170],"Moreover,":[63],"emulating":[64,156,175,285],"under":[67,131],"synthetic":[68,133],"workloads":[69],"on":[70,182,243],"FPGAs":[71],"typically":[72],"requires":[73],"large":[75],"amount":[76],"memory":[78,139,248],"thus":[80],"involves":[81],"use":[83,146],"off-chip":[85],"memory,":[86],"which":[87],"makes":[88],"overall":[90],"design":[91],"much":[92],"more":[93],"complicated":[94],"may":[96],"substantially":[97],"degrade":[98],"emulation":[100,110,215],"speed.":[101],"This":[102,190],"article":[103],"presents":[104],"methods":[105,173],"fast":[107],"cycle-accurate":[109],"nodes":[118,256,266,270],"using":[119,135,159,277],"single":[121,279],"FPGA.":[122],"We":[123,141,171],"first":[124],"describe":[125],"how":[126],"workload":[134],"only":[136,198,244],"on-chip":[138,247],"(BRAMs).":[140],"next":[142],"present":[143],"time-division":[148],"multiplexing":[149],"where":[150],"BRAMs":[151],"effectively":[153],"used":[154,185,303],"network":[158],"small":[161],"number":[162],"nodes,":[164],"thereby":[165],"overcoming":[166],"propose":[172],"both":[176],"direct":[177,199],"indirect":[179],"networks,":[180],"focusing":[181],"commonly":[184],"meshes":[186],"fat-trees":[188],"(k-aryn-trees).":[189],"different":[192],"from":[193],"prior":[194],"work":[195],"considers":[197],"networks.":[200],"Using":[201],"proposed":[203],"methods,":[204],"we":[205,289],"build":[206],"emulator,":[209],"called":[210],"FNoC,":[211],"demonstrate":[213],"some":[217],"mesh-based":[218,252],"fat-tree-based":[220,261],"canonical":[223],"router":[224],"architectures.":[225],"Our":[226],"evaluation":[227],"results":[228],"show":[229],"(1)":[231],"size":[233],"largest":[236],"can":[239,274],"be":[240,275],"emulated":[241,276],"depends":[242],"capacity;":[249],"(2)":[250],"16,384":[255],"(128\u00d7128":[257],"NoC)":[258,273],"6,144":[264],"switch":[265],"4,096":[268],"terminal":[269],"(4-ary":[271],"6-tree":[272],"Virtex-7":[280],"FPGA;":[281],"(3)":[283],"when":[284],"these":[286],"two":[287],"NoCs,":[288],"achieve,":[290],"respectively,":[291],"5,047\u00d7":[292],"232\u00d7":[294],"speedups":[295],"over":[296],"BookSim,":[297],"one":[298],"most":[301],"widely":[302],"software-based":[304],"simulators,":[306],"while":[307],"maintaining":[308],"same":[310],"level":[311],"accuracy.":[313]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
