{"id":"https://openalex.org/W2746544209","doi":"https://doi.org/10.1145/3127024.3127035","title":"Enhanced memory management for scalable MPI intra-node communication on many-core processor","display_name":"Enhanced memory management for scalable MPI intra-node communication on many-core processor","publication_year":2017,"publication_date":"2017-08-24","ids":{"openalex":"https://openalex.org/W2746544209","doi":"https://doi.org/10.1145/3127024.3127035","mag":"2746544209"},"language":"en","primary_location":{"id":"doi:10.1145/3127024.3127035","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3127024.3127035","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th European MPI Users' Group Meeting","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057868636","display_name":"Joong\u2010Yeon Cho","orcid":null},"institutions":[{"id":"https://openalex.org/I24062138","display_name":"Konkuk University","ror":"https://ror.org/025h1m602","country_code":"KR","type":"education","lineage":["https://openalex.org/I24062138"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Joong-Yeon Cho","raw_affiliation_strings":["Konkuk University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Konkuk University, Seoul, Korea","institution_ids":["https://openalex.org/I24062138"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060454909","display_name":"Hyun\u2010Wook Jin","orcid":"https://orcid.org/0000-0002-9496-3486"},"institutions":[{"id":"https://openalex.org/I24062138","display_name":"Konkuk University","ror":"https://ror.org/025h1m602","country_code":"KR","type":"education","lineage":["https://openalex.org/I24062138"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyun-Wook Jin","raw_affiliation_strings":["Konkuk University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Konkuk University, Seoul, Korea","institution_ids":["https://openalex.org/I24062138"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003405959","display_name":"Dukyun Nam","orcid":"https://orcid.org/0000-0003-1023-7311"},"institutions":[{"id":"https://openalex.org/I878022262","display_name":"Korea Institute of Science & Technology Information","ror":"https://ror.org/01k4yrm29","country_code":"KR","type":"facility","lineage":["https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098","https://openalex.org/I878022262"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dukyun Nam","raw_affiliation_strings":["KISTI, Daejeon, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"KISTI, Daejeon, Korea","institution_ids":["https://openalex.org/I878022262"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7608,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.67862715,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8733906745910645},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6707614064216614},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6022345423698425},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5766136646270752},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.5250808000564575},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.5220303535461426},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.4833669066429138},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43191248178482056},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.4299432933330536},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.42751389741897583},{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.4117127060890198},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4057556986808777},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2835002541542053},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.18247932195663452},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.10449177026748657}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8733906745910645},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6707614064216614},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6022345423698425},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5766136646270752},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.5250808000564575},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.5220303535461426},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4833669066429138},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43191248178482056},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.4299432933330536},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.42751389741897583},{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.4117127060890198},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4057556986808777},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2835002541542053},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.18247932195663452},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.10449177026748657},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3127024.3127035","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3127024.3127035","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th European MPI Users' Group Meeting","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1572624911","https://openalex.org/W1985665482","https://openalex.org/W2017915001","https://openalex.org/W2032654702","https://openalex.org/W2051322063","https://openalex.org/W2106103789","https://openalex.org/W2112184852","https://openalex.org/W2118646353","https://openalex.org/W2131413854","https://openalex.org/W2133352850","https://openalex.org/W2139783166","https://openalex.org/W2617127166","https://openalex.org/W3139689176","https://openalex.org/W3144982104","https://openalex.org/W4243966422","https://openalex.org/W4245970816"],"related_works":["https://openalex.org/W2101963191","https://openalex.org/W2770431327","https://openalex.org/W3217321752","https://openalex.org/W2626757163","https://openalex.org/W55745527","https://openalex.org/W3000696915","https://openalex.org/W4295235956","https://openalex.org/W2930731691","https://openalex.org/W2119548576","https://openalex.org/W2288758733"],"abstract_inverted_index":{"As":[0],"the":[1,13,42,58,64,90,99,107,125,139,154,176,187],"number":[2,91],"of":[3,92,109,121,178,189],"cores":[4],"installed":[5],"in":[6,119,124,161],"a":[7,71,80],"single":[8],"computing":[9],"node":[10],"drastically":[11],"increases,":[12],"intra-node":[14,37,110,122,163],"communication":[15,123,180,191],"between":[16],"parallel":[17,23],"processes":[18],"becomes":[19],"more":[20],"important.":[21],"The":[22,95,148],"programming":[24],"models,":[25],"such":[26,113],"as":[27],"Message":[28],"Passing":[29],"Interface":[30],"(MPI),":[31],"internally":[32],"perform":[33],"memory-intensive":[34],"operations":[35],"for":[36,105,145],"communication.":[38,111,164],"Thus,":[39],"to":[40,51,136,182],"address":[41],"scalability":[43],"issue":[44],"on":[45,172,194],"many-core":[46,66],"processors,":[47],"it":[48],"is":[49],"critical":[50],"exploit":[52],"emerging":[53],"memory":[54,74,97,133,141,158],"features":[55,114],"provided":[56],"by":[57,192],"contemporary":[59],"computer":[60],"systems.":[61],"For":[62],"example,":[63],"latest":[65],"processors":[67,77],"are":[68,115],"equipped":[69],"with":[70],"high-bandwidth":[72],"on-package":[73,96,140],"Modern":[75],"64-bit":[76],"also":[78],"support":[79,144],"large":[81],"page":[82],"size":[83],"(e.g.,":[84],"2MB),":[85],"which":[86],"can":[87,151,174,185],"significantly":[88,152],"reduce":[89,153,186],"TLB":[93],"misses.":[94],"and":[98,142,157,184],"huge":[100,146],"pages":[101],"have":[102],"considerable":[103],"potential":[104],"improving":[106],"performance":[108],"However,":[112],"not":[116],"thoroughly":[117],"investigated":[118],"terms":[120],"literature.":[126],"In":[127],"this":[128],"paper,":[129],"we":[130],"propose":[131],"enhanced":[132],"management":[134],"schemes":[135,150],"efficiently":[137],"utilize":[138],"provide":[143],"pages.":[147],"proposed":[149],"data":[155],"copy":[156],"mapping":[159],"overheads":[160],"MPI":[162],"Our":[165],"experimental":[166],"results":[167],"show":[168],"that":[169],"our":[170],"implementation":[171],"MVAPICH2":[173],"improve":[175],"bandwidth":[177],"point-to-point":[179],"up":[181],"373%,":[183],"latency":[188],"collective":[190],"79%":[193],"an":[195],"Intel":[196],"Xeon":[197],"Phi":[198],"Knights":[199],"Landing":[200],"(KNL)":[201],"processor.":[202]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}