{"id":"https://openalex.org/W2760949654","doi":"https://doi.org/10.1145/3125503.3125564","title":"Effective simulation of DRAM/PCM-based hybrid memory","display_name":"Effective simulation of DRAM/PCM-based hybrid memory","publication_year":2017,"publication_date":"2017-10-12","ids":{"openalex":"https://openalex.org/W2760949654","doi":"https://doi.org/10.1145/3125503.3125564","mag":"2760949654"},"language":"en","primary_location":{"id":"doi:10.1145/3125503.3125564","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3125503.3125564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Thirteenth ACM International Conference on Embedded Software 2017 Companion","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087025546","display_name":"Peiquan Jin","orcid":"https://orcid.org/0000-0002-3871-0548"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peiquan Jin","raw_affiliation_strings":["University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100369125","display_name":"Xiaoliang Wang","orcid":"https://orcid.org/0000-0003-4559-0553"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoliang Wang","raw_affiliation_strings":["University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101752332","display_name":"Dezhi Zhang","orcid":"https://orcid.org/0000-0002-6573-2515"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dezhi Zhang","raw_affiliation_strings":["University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020797370","display_name":"Lihua Yue","orcid":null},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lihua Yue","raw_affiliation_strings":["University of Science and Technology of China, Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Science and Technology of China, Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126520041"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11315","display_name":"Phase-change materials and chalcogenides","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11315","display_name":"Phase-change materials and chalcogenides","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10306","display_name":"Liquid Crystal Research Advancements","score":0.9789999723434448,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-change-memory","display_name":"Phase-change memory","score":0.9234426021575928},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8399578332901001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7231525182723999},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.4784688651561737},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4385567009449005},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.42497169971466064},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34707123041152954},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3246461749076843},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3095283508300781},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2878172993659973},{"id":"https://openalex.org/keywords/phase-change","display_name":"Phase change","score":0.20794463157653809},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15929707884788513}],"concepts":[{"id":"https://openalex.org/C64142963","wikidata":"https://www.wikidata.org/wiki/Q1153902","display_name":"Phase-change memory","level":3,"score":0.9234426021575928},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8399578332901001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7231525182723999},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.4784688651561737},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4385567009449005},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.42497169971466064},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34707123041152954},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3246461749076843},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3095283508300781},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2878172993659973},{"id":"https://openalex.org/C133256868","wikidata":"https://www.wikidata.org/wiki/Q7180940","display_name":"Phase change","level":2,"score":0.20794463157653809},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15929707884788513},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.0},{"id":"https://openalex.org/C61696701","wikidata":"https://www.wikidata.org/wiki/Q770766","display_name":"Engineering physics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3125503.3125564","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3125503.3125564","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Thirteenth ACM International Conference on Embedded Software 2017 Companion","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5299999713897705,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2096800126","https://openalex.org/W2145021036","https://openalex.org/W2162639668","https://openalex.org/W2204664557","https://openalex.org/W2295141246","https://openalex.org/W2526202524","https://openalex.org/W3008756550"],"related_works":["https://openalex.org/W2518930778","https://openalex.org/W2979599569","https://openalex.org/W3007039213","https://openalex.org/W3094611732","https://openalex.org/W2533585248","https://openalex.org/W2559795407","https://openalex.org/W2944414554","https://openalex.org/W2000563648","https://openalex.org/W3009022466","https://openalex.org/W2127643145"],"abstract_inverted_index":{"PCM":[0,21,31,43,97],"(Phase":[1],"Change":[2],"Memory)":[3],"as":[4],"a":[5,23,37,62,69,88],"new":[6,26],"kind":[7],"of":[8,25,96],"non-volatile":[9],"memory":[10,33,106],"has":[11,22],"received":[12],"much":[13],"attention":[14],"from":[15],"both":[16],"academia":[17],"and":[18,45,82,98,108],"industry.":[19],"While":[20],"number":[24],"features,":[27],"how":[28],"to":[29,55,67,92,104],"use":[30],"at":[32,41],"hierarchy":[34,107],"still":[35],"remains":[36],"problem.":[38],"In":[39,84],"addition,":[40,85],"present":[42],"chips":[44],"storage":[46],"devices":[47],"are":[48],"not":[49],"available.":[50],"This":[51],"makes":[52],"it":[53,86],"hard":[54],"evaluate":[56,109],"PCM-related":[57,73],"algorithms.":[58],"Thus,":[59],"we":[60],"design":[61],"flexible":[63],"simulator":[64],"named":[65],"DPHSim":[66,75],"provide":[68],"test":[70],"bed":[71],"for":[72,102],"studies.":[74],"can":[76],"simulate":[77,93,105],"various":[78],"configurations":[79],"on":[80,111],"DRAM":[81],"PCM.":[83],"utilizes":[87],"clock-based":[89],"timing":[90],"model":[91],"the":[94],"characteristics":[95],"offers":[99],"user-friendly":[100],"APIs":[101],"users":[103],"performance":[110],"DPHSim.":[112]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
