{"id":"https://openalex.org/W2765586026","doi":"https://doi.org/10.1145/3123939.3124536","title":"RTLcheck","display_name":"RTLcheck","publication_year":2017,"publication_date":"2017-10-14","ids":{"openalex":"https://openalex.org/W2765586026","doi":"https://doi.org/10.1145/3123939.3124536","mag":"2765586026"},"language":"en","primary_location":{"id":"doi:10.1145/3123939.3124536","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3123939.3124536","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027050350","display_name":"Yatin A. Manerkar","orcid":"https://orcid.org/0000-0002-6954-2292"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yatin A. Manerkar","raw_affiliation_strings":["Princeton University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078894707","display_name":"Daniel Lustig","orcid":"https://orcid.org/0000-0001-9763-7304"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daniel Lustig","raw_affiliation_strings":["NVIDIA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002015508","display_name":"Margaret Martonosi","orcid":"https://orcid.org/0000-0001-9683-8032"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Margaret Martonosi","raw_affiliation_strings":["Princeton University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009910914","display_name":"Michael Pellauer","orcid":"https://orcid.org/0000-0002-5305-4307"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michael Pellauer","raw_affiliation_strings":["NVIDIA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NVIDIA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"463","last_page":"476"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8069006204605103},{"id":"https://openalex.org/keywords/consistency","display_name":"Consistency (knowledge bases)","score":0.8057447671890259},{"id":"https://openalex.org/keywords/sequential-consistency","display_name":"Sequential consistency","score":0.7305920124053955},{"id":"https://openalex.org/keywords/consistency-model","display_name":"Consistency model","score":0.7217665910720825},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5021250247955322},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5015363693237305},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4368411600589752},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.43490564823150635},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4138370752334595},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38982778787612915},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.2724328637123108},{"id":"https://openalex.org/keywords/data-consistency","display_name":"Data consistency","score":0.23679980635643005},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08854115009307861}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8069006204605103},{"id":"https://openalex.org/C2776436953","wikidata":"https://www.wikidata.org/wiki/Q5163215","display_name":"Consistency (knowledge bases)","level":2,"score":0.8057447671890259},{"id":"https://openalex.org/C82029504","wikidata":"https://www.wikidata.org/wiki/Q4373882","display_name":"Sequential consistency","level":4,"score":0.7305920124053955},{"id":"https://openalex.org/C37279795","wikidata":"https://www.wikidata.org/wiki/Q2492305","display_name":"Consistency model","level":3,"score":0.7217665910720825},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5021250247955322},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5015363693237305},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4368411600589752},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.43490564823150635},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4138370752334595},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38982778787612915},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2724328637123108},{"id":"https://openalex.org/C93361087","wikidata":"https://www.wikidata.org/wiki/Q4426698","display_name":"Data consistency","level":2,"score":0.23679980635643005},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08854115009307861}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3123939.3124536","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3123939.3124536","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G2273220978","display_name":null,"funder_award_id":"CCF-1117147","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6485245682","display_name":null,"funder_award_id":"HR0011-13-3-0002","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320309074","display_name":"Cadence Design Systems","ror":"https://ror.org/04w8xa018"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W617996372","https://openalex.org/W1147832988","https://openalex.org/W1516936561","https://openalex.org/W1525350307","https://openalex.org/W1753021227","https://openalex.org/W1968283843","https://openalex.org/W2012262513","https://openalex.org/W2046161500","https://openalex.org/W2054739713","https://openalex.org/W2091085450","https://openalex.org/W2103283735","https://openalex.org/W2105900173","https://openalex.org/W2105945277","https://openalex.org/W2111858071","https://openalex.org/W2117502039","https://openalex.org/W2132117132","https://openalex.org/W2138074470","https://openalex.org/W2142101409","https://openalex.org/W2146399815","https://openalex.org/W2152885346","https://openalex.org/W2153636750","https://openalex.org/W2234646418","https://openalex.org/W2235853928","https://openalex.org/W2280574045","https://openalex.org/W2301631282","https://openalex.org/W2315915350","https://openalex.org/W2404126842","https://openalex.org/W2476747876","https://openalex.org/W2507977852","https://openalex.org/W2511473180","https://openalex.org/W2533078207","https://openalex.org/W2549657998","https://openalex.org/W2625764229","https://openalex.org/W2738891045","https://openalex.org/W3104212406","https://openalex.org/W4234066571","https://openalex.org/W4240322740","https://openalex.org/W4251030308","https://openalex.org/W4256041698","https://openalex.org/W4392361663"],"related_works":["https://openalex.org/W2044887272","https://openalex.org/W246909719","https://openalex.org/W1885534640","https://openalex.org/W1906213980","https://openalex.org/W2036306661","https://openalex.org/W2105768184","https://openalex.org/W2505917360","https://openalex.org/W118795575","https://openalex.org/W1738788207","https://openalex.org/W1524796877"],"abstract_inverted_index":{"Paramount":[0],"to":[1],"the":[2,9,47],"viability":[3],"of":[4,12,40],"a":[5,29,41],"parallel":[6],"architecture":[7],"is":[8],"correct":[10],"implementation":[11],"its":[13],"memory":[14],"consistency":[15,23,42],"model":[16,43],"(MCM).":[17],"Although":[18],"tools":[19],"exist":[20],"for":[21],"verifying":[22,45],"models":[24],"at":[25],"several":[26],"design":[27],"levels,":[28],"problematic":[30],"verification":[31],"gap":[32],"exists":[33],"between":[34],"checking":[35],"an":[36],"abstract":[37],"microarchitectural":[38],"specification":[39],"and":[44],"that":[46],"actual":[48],"processor":[49],"RTL":[50],"implements":[51],"it":[52],"correctly.":[53]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2017-11-10T00:00:00"}
