{"id":"https://openalex.org/W2766490726","doi":"https://doi.org/10.1145/3109984.3110002","title":"An analog RF fully differential common mode controlled delay line in 28nm FDSOI technology","display_name":"An analog RF fully differential common mode controlled delay line in 28nm FDSOI technology","publication_year":2017,"publication_date":"2017-08-28","ids":{"openalex":"https://openalex.org/W2766490726","doi":"https://doi.org/10.1145/3109984.3110002","mag":"2766490726"},"language":"en","primary_location":{"id":"doi:10.1145/3109984.3110002","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3109984.3110002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017998599","display_name":"Victor Vaillant","orcid":"https://orcid.org/0000-0002-8067-6136"},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Victor Vaillant","raw_affiliation_strings":["IMS Laboratory, Talence, FRANCE"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Talence, FRANCE","institution_ids":["https://openalex.org/I4210157089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090763602","display_name":"Fran\u00e7ois Rivet","orcid":"https://orcid.org/0000-0002-6003-4208"},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Fran\u00e7ois Rivet","raw_affiliation_strings":["IMS Laboratory, Talence, FRANCE"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Talence, FRANCE","institution_ids":["https://openalex.org/I4210157089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5017998599"],"corresponding_institution_ids":["https://openalex.org/I4210157089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.14473007,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"120","last_page":"124"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.7419707775115967},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.7042701840400696},{"id":"https://openalex.org/keywords/microelectronics","display_name":"Microelectronics","score":0.6091271042823792},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5930187702178955},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.5866410136222839},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.5702782869338989},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5139431357383728},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5047670602798462},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.46633076667785645},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4547339081764221},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.4507378339767456},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.4320729970932007},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3877827227115631},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.36908942461013794},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3568878173828125},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.26398149132728577},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.21198135614395142},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.14687296748161316}],"concepts":[{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.7419707775115967},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.7042701840400696},{"id":"https://openalex.org/C187937830","wikidata":"https://www.wikidata.org/wiki/Q175403","display_name":"Microelectronics","level":2,"score":0.6091271042823792},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5930187702178955},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.5866410136222839},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.5702782869338989},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5139431357383728},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5047670602798462},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.46633076667785645},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4547339081764221},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.4507378339767456},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.4320729970932007},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3877827227115631},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.36908942461013794},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3568878173828125},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.26398149132728577},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.21198135614395142},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.14687296748161316},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3109984.3110002","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3109984.3110002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7900000214576721,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1544257340","https://openalex.org/W1830597958","https://openalex.org/W2021454578","https://openalex.org/W2033850368","https://openalex.org/W2058743909","https://openalex.org/W2061734564","https://openalex.org/W2078939486","https://openalex.org/W2105626766","https://openalex.org/W2128394531","https://openalex.org/W2168661325","https://openalex.org/W2188904679"],"related_works":["https://openalex.org/W115888153","https://openalex.org/W1585429535","https://openalex.org/W2774445564","https://openalex.org/W2229324318","https://openalex.org/W1591963733","https://openalex.org/W2060224337","https://openalex.org/W1585320216","https://openalex.org/W4300617157","https://openalex.org/W2932393588","https://openalex.org/W74857428"],"abstract_inverted_index":{"This":[0,44],"paper":[1],"presents":[2],"an":[3],"integrated":[4],"Analog":[5],"Delay":[6],"Line":[7],"(ADL)":[8],"for":[9,68],"analog":[10],"RF":[11],"signal":[12,32],"processing.":[13],"The":[14,54],"design":[15],"is":[16,46,66],"inspired":[17],"by":[18],"a":[19,29],"Bucket":[20],"Brigade":[21],"Device":[22],"(BBD)":[23],"structure.":[24],"It":[25,36],"transfers":[26],"charges":[27],"from":[28,63,74],"sampled":[30],"input":[31],"stage":[33],"after":[34],"stage.":[35],"belongs":[37],"to":[38],"the":[39,69],"Charge":[40],"Coupled":[41],"Devices":[42],"(CCD).":[43],"ADL":[45],"fully":[47],"differential":[48],"with":[49],"Common":[50],"Mode":[51],"(CM)":[52],"control.":[53],"28nm":[55],"Fully":[56],"Depleted":[57],"Silicon":[58],"on":[59],"Insulator":[60],"(FDSOI)":[61],"Technology":[62],"ST":[64],"Microelectronics":[65],"used":[67],"design.":[70],"Further":[71],"results":[72],"come":[73],"simulations":[75],"using":[76],"Spectre":[77],"Cadence.":[78]},"counts_by_year":[{"year":2021,"cited_by_count":2}],"updated_date":"2026-05-05T08:41:31.759640","created_date":"2025-10-10T00:00:00"}
