{"id":"https://openalex.org/W2766685595","doi":"https://doi.org/10.1145/3109984.3109999","title":"Segmented spline hardware design for high dynamic range video pre-processor","display_name":"Segmented spline hardware design for high dynamic range video pre-processor","publication_year":2017,"publication_date":"2017-08-28","ids":{"openalex":"https://openalex.org/W2766685595","doi":"https://doi.org/10.1145/3109984.3109999","mag":"2766685595"},"language":"en","primary_location":{"id":"doi:10.1145/3109984.3109999","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3109984.3109999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032605773","display_name":"Alex Borges","orcid":"https://orcid.org/0000-0002-1264-5055"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Alex Borges","raw_affiliation_strings":["Universidade Federal de Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal de Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028595724","display_name":"Luciano Braatz","orcid":"https://orcid.org/0000-0003-2385-8918"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luciano Braatz","raw_affiliation_strings":["Universidade Federal de Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal de Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057414253","display_name":"Bruno Zatt","orcid":"https://orcid.org/0000-0002-8045-957X"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Bruno Zatt","raw_affiliation_strings":["Universidade Federal de Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal de Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081630912","display_name":"Marcelo Porto","orcid":"https://orcid.org/0000-0003-3827-3023"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marcelo Porto","raw_affiliation_strings":["Universidade Federal de Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal de Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024570296","display_name":"Guilherme Corr\u00eaa","orcid":"https://orcid.org/0000-0002-2739-6194"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Guilherme Corr\u00eaa","raw_affiliation_strings":["Universidade Federal de Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"Universidade Federal de Pelotas, Brazil","institution_ids":["https://openalex.org/I169248161"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5032605773"],"corresponding_institution_ids":["https://openalex.org/I169248161"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.15007245,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"143","last_page":"148"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9866999983787537,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7489079236984253},{"id":"https://openalex.org/keywords/high-dynamic-range","display_name":"High dynamic range","score":0.5119415521621704},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4758546054363251},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.45673322677612305},{"id":"https://openalex.org/keywords/spline","display_name":"Spline (mechanical)","score":0.42477428913116455},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.4109065532684326},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3422994613647461},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.3421451151371002},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.31984999775886536},{"id":"https://openalex.org/keywords/computer-vision","display_name":"Computer vision","score":0.21381273865699768},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.107442706823349}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7489079236984253},{"id":"https://openalex.org/C2780056265","wikidata":"https://www.wikidata.org/wiki/Q106239881","display_name":"High dynamic range","level":3,"score":0.5119415521621704},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4758546054363251},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.45673322677612305},{"id":"https://openalex.org/C10390562","wikidata":"https://www.wikidata.org/wiki/Q581809","display_name":"Spline (mechanical)","level":2,"score":0.42477428913116455},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.4109065532684326},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3422994613647461},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.3421451151371002},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.31984999775886536},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.21381273865699768},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.107442706823349},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3109984.3109999","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3109984.3109999","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[],"funders":[{"id":"https://openalex.org/F4320318455","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2005921076","https://openalex.org/W2044470449","https://openalex.org/W2092055313","https://openalex.org/W2563638565"],"related_works":["https://openalex.org/W2884377208","https://openalex.org/W2525745698","https://openalex.org/W2010724756","https://openalex.org/W2152030049","https://openalex.org/W2564543331","https://openalex.org/W2410869481","https://openalex.org/W2466475649","https://openalex.org/W1967888462","https://openalex.org/W2371190228","https://openalex.org/W4224781608"],"abstract_inverted_index":{"Digital":[0],"video":[1,44,65,74,89],"capturing":[2],"generates":[3],"a":[4,46,95,107,116],"huge":[5],"amount":[6],"of":[7,18,58,70,73,141,151],"data":[8,78],"to":[9,34,51,62,79,98,101,106],"be":[10,52,80,111],"processed":[11],"and":[12,37,82,165],"stored,":[13],"which":[14,145],"requires":[15],"the":[16,55,64,68,103,120,125,128,142,149,166,170],"use":[17],"compression":[19],"techniques.":[20],"Efficient":[21],"hardware":[22,117,132,172],"designs":[23],"for":[24,30,85,119,159],"real-time":[25],"encoding":[26],"are":[27],"mandatory,":[28],"especially":[29],"embedded":[31],"systems,":[32],"due":[33],"their":[35],"performance":[36],"energy":[38],"constraints.":[39],"High":[40],"Dynamic":[41],"Range":[42],"(HDR)":[43],"is":[45],"new":[47],"technology":[48],"that":[49,109],"tends":[50],"present":[53],"in":[54,60,76,88],"next":[56],"generation":[57],"devices":[59],"order":[61],"improve":[63],"quality.":[66],"However,":[67],"particularities":[69],"this":[71],"kind":[72],"incur":[75],"increased":[77],"stored":[81],"require":[83],"support":[84],"special":[86],"features":[87],"processors/codecs.":[90],"The":[91,131,154],"current":[92],"approach":[93],"includes":[94],"pre-processor":[96],"annex":[97],"an":[99,160],"encoder":[100],"convert":[102],"HDR":[104,126],"videos":[105],"format":[108],"can":[110,173],"handled.":[112],"This":[113],"work":[114,174],"presents":[115],"design":[118,133],"most":[121],"time-consuming":[122],"process":[123],"within":[124],"pre-processor,":[127],"Segmented":[129,143],"Spline.":[130],"was":[134,157],"developed":[135,155],"based":[136],"on":[137],"hardware-oriented":[138],"mathematical":[139],"simplifications":[140],"Spline,":[144],"reduce":[146],"about":[147],"50%":[148],"number":[150],"basic":[152],"operators.":[153],"architecture":[156],"synthesized":[158],"Altera":[161],"Stratix":[162],"V":[163],"FPGA,":[164],"synthesis":[167],"results":[168],"show":[169],"optimized":[171],"at":[175],"17.56MHz":[176],"using":[177],"approximately":[178],"11k":[179],"ALMs.":[180]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
