{"id":"https://openalex.org/W2738228043","doi":"https://doi.org/10.1145/3102980.3102982","title":"Towards O(1) Memory","display_name":"Towards O(1) Memory","publication_year":2017,"publication_date":"2017-05-07","ids":{"openalex":"https://openalex.org/W2738228043","doi":"https://doi.org/10.1145/3102980.3102982","mag":"2738228043"},"language":"en","primary_location":{"id":"doi:10.1145/3102980.3102982","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3102980.3102982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th Workshop on Hot Topics in Operating Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072740120","display_name":"Michael M. Swift","orcid":"https://orcid.org/0000-0002-7926-648X"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Michael M. Swift","raw_affiliation_strings":["University of Wisconsin-Madison"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Wisconsin-Madison","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5072740120"],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":null,"apc_paid":null,"fwci":1.1412,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.78337419,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"7","last_page":"11"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7256041765213013},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.6326204538345337},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5946176648139954},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5763598680496216},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.5590417981147766},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.5457838773727417},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5225721597671509},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.5017554759979248},{"id":"https://openalex.org/keywords/memory-protection","display_name":"Memory protection","score":0.4994802474975586},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.4876214563846588},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48195192217826843},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.4616953134536743},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.43789979815483093},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4152315855026245},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.4107678234577179},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.41051626205444336},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4104631841182709},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.30495214462280273},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2828066647052765}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7256041765213013},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.6326204538345337},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5946176648139954},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5763598680496216},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.5590417981147766},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.5457838773727417},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5225721597671509},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.5017554759979248},{"id":"https://openalex.org/C18131444","wikidata":"https://www.wikidata.org/wiki/Q163585","display_name":"Memory protection","level":5,"score":0.4994802474975586},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.4876214563846588},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48195192217826843},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.4616953134536743},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.43789979815483093},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4152315855026245},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.4107678234577179},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.41051626205444336},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4104631841182709},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.30495214462280273},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2828066647052765}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3102980.3102982","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3102980.3102982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th Workshop on Hot Topics in Operating Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7699999809265137,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W98895588","https://openalex.org/W308775487","https://openalex.org/W1608813144","https://openalex.org/W1746694335","https://openalex.org/W1992755462","https://openalex.org/W2000381234","https://openalex.org/W2028802049","https://openalex.org/W2035752434","https://openalex.org/W2107082099","https://openalex.org/W2135384752","https://openalex.org/W2159479644","https://openalex.org/W2160127232","https://openalex.org/W2174360263","https://openalex.org/W2187160481","https://openalex.org/W2199253235","https://openalex.org/W2330744268","https://openalex.org/W2336695920","https://openalex.org/W2340138069","https://openalex.org/W2471077310","https://openalex.org/W2576312950","https://openalex.org/W2621112614","https://openalex.org/W4248953716","https://openalex.org/W4252867443","https://openalex.org/W6683210214","https://openalex.org/W6685223547","https://openalex.org/W6686887250","https://openalex.org/W6720284283"],"related_works":["https://openalex.org/W4243333834","https://openalex.org/W2558276258","https://openalex.org/W2753615087","https://openalex.org/W2140386982","https://openalex.org/W2334181344","https://openalex.org/W3048967625","https://openalex.org/W2401095501","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W2493772236"],"abstract_inverted_index":{"Since":[0],"the":[1],"dawn":[2],"of":[3],"computing,":[4],"memory":[5,16,25,33,41],"capacity":[6,34],"has":[7],"been":[8],"a":[9],"primary":[10],"limitation":[11],"in":[12],"system":[13,50],"design.":[14],"Forthcoming":[15],"technology":[17],"such":[18],"as":[19],"Intel":[20],"and":[21,26,46],"Micron's":[22],"3D":[23],"XPoint":[24],"other":[27],"technologies":[28,42],"may":[29],"provide":[30],"far":[31],"larger":[32],"than":[35],"ever":[36],"before.":[37],"Furthermore,":[38],"these":[39],"new":[40],"are":[43],"inherently":[44],"persistent":[45],"save":[47],"data":[48],"across":[49],"crashes":[51],"or":[52],"power":[53],"failures.":[54]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}