{"id":"https://openalex.org/W2612733321","doi":"https://doi.org/10.1145/3078155.3078163","title":"Applying Models of Computation to OpenCL Pipes for FPGA Computing","display_name":"Applying Models of Computation to OpenCL Pipes for FPGA Computing","publication_year":2017,"publication_date":"2017-05-10","ids":{"openalex":"https://openalex.org/W2612733321","doi":"https://doi.org/10.1145/3078155.3078163","mag":"2612733321"},"language":"en","primary_location":{"id":"doi:10.1145/3078155.3078163","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3078155.3078163","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th International Workshop on OpenCL","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015534628","display_name":"Nachiket Kapre","orcid":"https://orcid.org/0000-0002-2187-0406"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Nachiket Kapre","raw_affiliation_strings":["University of Waterloo, Waterloo, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hiren Patel","raw_affiliation_strings":["University of Waterloo, Waterloo, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Ontario, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8951506614685059},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7011650204658508},{"id":"https://openalex.org/keywords/programmer","display_name":"Programmer","score":0.7000141739845276},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6677784323692322},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.6486778259277344},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5454304218292236},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5080916881561279},{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.5002143383026123},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4972534477710724},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.46553176641464233},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4643246531486511},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.4448452591896057},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3951982259750366},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22955241799354553},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.20835080742835999},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17344102263450623}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8951506614685059},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7011650204658508},{"id":"https://openalex.org/C2778514511","wikidata":"https://www.wikidata.org/wiki/Q1374194","display_name":"Programmer","level":2,"score":0.7000141739845276},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6677784323692322},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.6486778259277344},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5454304218292236},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5080916881561279},{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.5002143383026123},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4972534477710724},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.46553176641464233},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4643246531486511},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.4448452591896057},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3951982259750366},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22955241799354553},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.20835080742835999},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17344102263450623},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3078155.3078163","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3078155.3078163","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th International Workshop on OpenCL","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2045271686","https://openalex.org/W2091158003","https://openalex.org/W2110425399","https://openalex.org/W2399715892","https://openalex.org/W3043074253","https://openalex.org/W4211008702"],"related_works":["https://openalex.org/W2621501241","https://openalex.org/W2208757713","https://openalex.org/W3177128669","https://openalex.org/W1537323515","https://openalex.org/W2991848348","https://openalex.org/W2268897697","https://openalex.org/W2956082141","https://openalex.org/W1905242396","https://openalex.org/W3037515626","https://openalex.org/W2502510154"],"abstract_inverted_index":{"OpenCL":[0,42,62,118,153],"pipes":[1],"offer":[2,97],"a":[3,77,98,130],"powerful":[4],"construct":[5],"for":[6,117,146],"synthesizing":[7],"multi-kernel":[8],"FPGA":[9,20,31,126,152],"applications":[10],"with":[11,29],"inter-kernel":[12],"communication":[13,16,78,102],"dependencies.":[14],"The":[15],"discipline":[17,79],"between":[18],"the":[19,39,41,55,122,125,151],"kernels":[21],"is":[22,44,115],"restricted":[23,99],"to":[24,46],"producer-consumer":[25],"style":[26],"patterns":[27,103],"supported":[28],"on-chip":[30],"FIFOs.":[32],"While":[33],"this":[34],"provides":[35],"few":[36],"restrictions":[37],"on":[38,49],"usage,":[40],"compiler":[43,140],"unable":[45],"provide":[47,129],"guarantees":[48],"buffering":[50],"capacity":[51],"or":[52,68],"schedulability":[53],"of":[54,83,101,124,133],"connected":[56],"kernels.":[57],"Without":[58],"these":[59,148],"guarantees,":[60],"an":[61],"developer":[63],"may":[64],"over-provision":[65],"hardware":[66],"resources":[67],"assume":[69],"pessimistic":[70],"timing":[71],"during":[72],"scheduling.":[73],"We":[74,128],"propose":[75],"imposing":[76],"inspired":[80],"from":[81],"models":[82,96],"computation":[84],"(e.g.Ptolemy)":[85],"such":[86],"as":[87],"synchronous":[88,93],"dataflow":[89],"(SDF),":[90],"and":[91,108,111,136,139],"bulk":[92],"(BSP).":[94],"These":[95],"subset":[100],"that":[104,142],"enable":[105],"implementation":[106],"tradeoffs":[107],"deliver":[109],"performance":[110],"resource":[112],"guarantees.":[113],"This":[114],"useful":[116],"developers":[119],"operating":[120],"within":[121],"constraints":[123],"device.":[127],"preliminary":[131],"analysis":[132],"our":[134],"proposal":[135],"sketch":[137],"programmer":[138],"responsibilities":[141],"would":[143],"be":[144],"needed":[145],"integrating":[147],"features":[149],"into":[150],"environment.":[154]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}