{"id":"https://openalex.org/W2624718095","doi":"https://doi.org/10.1145/3061639.3072945","title":"Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems","display_name":"Advances in Formal Methods for the Design of Analog/Mixed-Signal Systems","publication_year":2017,"publication_date":"2017-06-13","ids":{"openalex":"https://openalex.org/W2624718095","doi":"https://doi.org/10.1145/3061639.3072945","mag":"2624718095"},"language":"en","primary_location":{"id":"doi:10.1145/3061639.3072945","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3061639.3072945","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=3072945&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 54th Annual Design Automation Conference 2017","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"http://dl.acm.org/ft_gateway.cfm?id=3072945&type=pdf","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066547919","display_name":"Vladimir Dubikhin","orcid":"https://orcid.org/0000-0003-3843-3541"},"institutions":[{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Vladimir Dubikhin","raw_affiliation_strings":["Newcastle University, Newcastle upon Tyne, UK"],"affiliations":[{"raw_affiliation_string":"Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111386695","display_name":"Chris J. Myers","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chris Myers","raw_affiliation_strings":["University of Utah, Salt Lake City, USA"],"affiliations":[{"raw_affiliation_string":"University of Utah, Salt Lake City, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015272875","display_name":"Danil Sokolov","orcid":"https://orcid.org/0000-0002-4030-0089"},"institutions":[{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Danil Sokolov","raw_affiliation_strings":["Newcastle University, Newcastle upon Tyne, UK"],"affiliations":[{"raw_affiliation_string":"Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002146484","display_name":"Ioannis Syranidis","orcid":null},"institutions":[{"id":"https://openalex.org/I4210089203","display_name":"Cadence Design Systems (Germany)","ror":"https://ror.org/00d9ep044","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210089203","https://openalex.org/I66217453"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ioannis Syranidis","raw_affiliation_strings":["Cadence Design Systems, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, Munich, Germany","institution_ids":["https://openalex.org/I4210089203"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029446985","display_name":"Alex Yakovlev","orcid":"https://orcid.org/0000-0003-0826-9330"},"institutions":[{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alex Yakovlev","raw_affiliation_strings":["Newcastle University, Newcastle upon Tyne, UK"],"affiliations":[{"raw_affiliation_string":"Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5066547919"],"corresponding_institution_ids":["https://openalex.org/I84884186"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.05796707,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7806972861289978},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.741989254951477},{"id":"https://openalex.org/keywords/workflow","display_name":"Workflow","score":0.6358829140663147},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4898369014263153},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.48833152651786804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4649677574634552},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.4598918557167053},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4183272123336792},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.4138292074203491},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.18551146984100342},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.17600604891777039},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16717496514320374},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.166812002658844},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13622605800628662},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08291757106781006}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7806972861289978},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.741989254951477},{"id":"https://openalex.org/C177212765","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Workflow","level":2,"score":0.6358829140663147},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4898369014263153},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.48833152651786804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4649677574634552},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.4598918557167053},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4183272123336792},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.4138292074203491},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.18551146984100342},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.17600604891777039},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16717496514320374},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.166812002658844},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13622605800628662},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08291757106781006},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3061639.3072945","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3061639.3072945","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=3072945&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 54th Annual Design Automation Conference 2017","raw_type":"proceedings-article"},{"id":"pmh:oai:eprint.ncl.ac.uk:240135","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4306402485","display_name":"Newcastle University ePrints (Newcastle Univesity)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I84884186","host_organization_name":"Newcastle University","host_organization_lineage":["https://openalex.org/I84884186"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"doi:10.1145/3061639.3072945","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3061639.3072945","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=3072945&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 54th Annual Design Automation Conference 2017","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G1659302045","display_name":"SHF: Small: Collaborative Research: Integrated Verification, Built-in Self-test, and Tuning for Digitally-Intensive Analog Systems","funder_award_id":"1117515","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G3330119427","display_name":null,"funder_award_id":"EPSRC","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G3414545138","display_name":null,"funder_award_id":"CCF-1117515","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G4286521953","display_name":"A4A: Asynchronous design for analogue electronics","funder_award_id":"EP/L025507/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6143952702","display_name":null,"funder_award_id":"EP/L025507/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G848032724","display_name":null,"funder_award_id":"Science","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2624718095.pdf","grobid_xml":"https://content.openalex.org/works/W2624718095.grobid-xml"},"referenced_works_count":45,"referenced_works":["https://openalex.org/W144037624","https://openalex.org/W149082927","https://openalex.org/W836593775","https://openalex.org/W1504065953","https://openalex.org/W1504939165","https://openalex.org/W1565620212","https://openalex.org/W1586625328","https://openalex.org/W1604596197","https://openalex.org/W1966116895","https://openalex.org/W1982904663","https://openalex.org/W1993240518","https://openalex.org/W1994364444","https://openalex.org/W1996174386","https://openalex.org/W2015211370","https://openalex.org/W2015938004","https://openalex.org/W2047080991","https://openalex.org/W2054242451","https://openalex.org/W2054258232","https://openalex.org/W2089352175","https://openalex.org/W2116358561","https://openalex.org/W2120352490","https://openalex.org/W2124038915","https://openalex.org/W2130434989","https://openalex.org/W2144785157","https://openalex.org/W2153160343","https://openalex.org/W2158533859","https://openalex.org/W2160823654","https://openalex.org/W2167915846","https://openalex.org/W2170778594","https://openalex.org/W2176215692","https://openalex.org/W2187918184","https://openalex.org/W2188376597","https://openalex.org/W2291189355","https://openalex.org/W2298557969","https://openalex.org/W2316302866","https://openalex.org/W2340714136","https://openalex.org/W2475835295","https://openalex.org/W2505960287","https://openalex.org/W2560771452","https://openalex.org/W2575288472","https://openalex.org/W2578616199","https://openalex.org/W2594560887","https://openalex.org/W4211171470","https://openalex.org/W4285719527","https://openalex.org/W6605785886"],"related_works":["https://openalex.org/W1948903516","https://openalex.org/W1993985975","https://openalex.org/W2146990170","https://openalex.org/W2187164010","https://openalex.org/W4312516786","https://openalex.org/W2085028021","https://openalex.org/W2138474603","https://openalex.org/W3094139610","https://openalex.org/W937897205","https://openalex.org/W2093992207"],"abstract_inverted_index":{"Analog/mixed-signal":[0],"(AMS)":[1],"systems":[2],"are":[3,15,53,99],"rapidly":[4],"expanding":[5],"in":[6,30,114],"all":[7],"domains":[8],"of":[9,19,42,71,85,94,111,125],"information":[10],"and":[11,33,36,50,61,118],"communication":[12],"technology.":[13],"They":[14],"a":[16,39],"critical":[17],"part":[18],"the":[20,69,82,91,112,123,136,143],"support":[21],"for":[22,81],"large-scale":[23],"high-performance":[24],"digital":[25,51],"systems,":[26,35],"provide":[27],"important":[28],"functionalities":[29],"medium-scale":[31],"embedded":[32],"mobile":[34],"act":[37],"as":[38,46],"core":[40],"organ":[41],"autonomous":[43],"electronics":[44,74],"such":[45,130],"sensor":[47],"nodes.":[48],"Analog":[49],"parts":[52],"closely":[54],"intermixed,":[55],"hence":[56],"demanding":[57],"AMS":[58,95,115],"design":[59,120],"methods":[60,98],"tools":[62],"to":[63,101],"be":[64],"more":[65],"holistic.":[66],"In":[67],"particular,":[68],"emergence":[70],"\"little":[72],"digital\"":[73],"inside":[75],"or":[76],"near":[77],"analog":[78],"circuitry":[79],"calls":[80],"increasing":[83],"use":[84],"asynchronous":[86,119],"logic.":[87],"To":[88],"cope":[89],"with":[90],"growing":[92],"complexity":[93],"designs,":[96],"formal":[97,116],"required":[100],"complement":[102],"traditional":[103],"simulation":[104],"approaches.":[105],"This":[106],"paper":[107],"presents":[108],"an":[109],"overview":[110],"state-of-the-art":[113],"verification":[117],"that":[121],"enables":[122],"development":[124,141],"analog/asynchronous":[126],"co-design":[127,131],"methods.":[128],"One":[129],"methodology":[132],"is":[133],"exemplified":[134],"by":[135,142],"LEMA-Workcraft":[137],"workflow":[138],"currently":[139],"under":[140],"authors.":[144]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-15T09:29:46.208133","created_date":"2025-10-10T00:00:00"}
