{"id":"https://openalex.org/W2533705682","doi":"https://doi.org/10.1145/3001854.3001861","title":"Managing persistent heap in NVRAM","display_name":"Managing persistent heap in NVRAM","publication_year":2016,"publication_date":"2016-10-21","ids":{"openalex":"https://openalex.org/W2533705682","doi":"https://doi.org/10.1145/3001854.3001861","mag":"2533705682"},"language":"en","primary_location":{"id":"doi:10.1145/3001854.3001861","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3001854.3001861","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st International Workshop on Mobile Development","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015566265","display_name":"Kumud Bhandari","orcid":null},"institutions":[{"id":"https://openalex.org/I74775410","display_name":"Rice University","ror":"https://ror.org/008zs3103","country_code":"US","type":"education","lineage":["https://openalex.org/I74775410"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kumud Bhandari","raw_affiliation_strings":["Rice University, USA"],"affiliations":[{"raw_affiliation_string":"Rice University, USA","institution_ids":["https://openalex.org/I74775410"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5015566265"],"corresponding_institution_ids":["https://openalex.org/I74775410"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11472635,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"6","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.8601400852203369},{"id":"https://openalex.org/keywords/allocator","display_name":"Allocator","score":0.7800073027610779},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7692251205444336},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6275995373725891},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.589654266834259},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5547116994857788},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.45754075050354004},{"id":"https://openalex.org/keywords/persistent-data-structure","display_name":"Persistent data structure","score":0.44147664308547974},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4253014922142029},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.4240735173225403},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3116694688796997},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2879844307899475},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2680085003376007},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.19643497467041016},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.188014417886734},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1123930811882019},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.08640983700752258}],"concepts":[{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.8601400852203369},{"id":"https://openalex.org/C162262903","wikidata":"https://www.wikidata.org/wiki/Q343527","display_name":"Allocator","level":2,"score":0.7800073027610779},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7692251205444336},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6275995373725891},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.589654266834259},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5547116994857788},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.45754075050354004},{"id":"https://openalex.org/C888380","wikidata":"https://www.wikidata.org/wiki/Q2427787","display_name":"Persistent data structure","level":2,"score":0.44147664308547974},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4253014922142029},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.4240735173225403},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3116694688796997},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2879844307899475},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2680085003376007},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.19643497467041016},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.188014417886734},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1123930811882019},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.08640983700752258},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3001854.3001861","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3001854.3001861","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st International Workshop on Mobile Development","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2005907808","https://openalex.org/W2041135949","https://openalex.org/W2076311302","https://openalex.org/W2101349786","https://openalex.org/W2102449048","https://openalex.org/W2112181056","https://openalex.org/W2113637091","https://openalex.org/W2161047342","https://openalex.org/W2396406070","https://openalex.org/W2538785949","https://openalex.org/W2734915837"],"related_works":["https://openalex.org/W2396406070","https://openalex.org/W2290022288","https://openalex.org/W4285797368","https://openalex.org/W2169710001","https://openalex.org/W45732507","https://openalex.org/W1559720592","https://openalex.org/W2144538993","https://openalex.org/W2538785949","https://openalex.org/W2122491468","https://openalex.org/W2010367507"],"abstract_inverted_index":{"The":[0],"scalability":[1],"limitations":[2],"of":[3,32,49,54,86],"current":[4],"DRAM":[5],"technology":[6],"have":[7],"prompted":[8],"research":[9],"in":[10,23],"alternative":[11],"memory":[12,35,72,79],"technologies.":[13],"Almost":[14],"all":[15],"new":[16],"viable":[17],"alternatives":[18],"being":[19],"explored":[20],"are":[21],"non-volatile":[22,34],"nature.":[24],"In":[25],"this":[26],"talk,":[27],"we":[28,59],"explore":[29],"the":[30,41,47,52,70],"implication":[31],"emerging":[33],"technologies":[36],"(NVRAM)":[37],"to":[38,69,103],"mobile":[39],"computing,":[40],"persistence":[42],"programming":[43,88,96],"models":[44],"inspired":[45],"by":[46],"emergence":[48],"NVRAM,":[50],"and":[51,98],"challenges":[53],"managing":[55],"persistent":[56,71,78],"memory.":[57],"Finally,":[58],"present":[60],"Makalu,":[61],"an":[62],"approach":[63],"that":[64],"represents":[65],"one":[66],"possible":[67],"solution":[68],"management":[73],"challenges.":[74],"Makalu":[75],"avoids":[76],"failure-induced":[77],"leaks,":[80],"offers":[81],"interoperability":[82],"with":[83],"a":[84,93],"variety":[85],"NVRAM":[87],"libraries":[89],"(NVMPLs),":[90],"while":[91],"supporting":[92],"less":[94],"restrictive":[95],"model":[97],"delivering":[99],"better":[100],"performance":[101],"compared":[102],"existing":[104],"NVMPLs'":[105],"default":[106],"allocators.":[107]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}