{"id":"https://openalex.org/W2531634699","doi":"https://doi.org/10.1145/2984393.2984414","title":"SER Analysis of Multiple Transient Faults in Combinational Logic","display_name":"SER Analysis of Multiple Transient Faults in Combinational Logic","publication_year":2016,"publication_date":"2016-09-25","ids":{"openalex":"https://openalex.org/W2531634699","doi":"https://doi.org/10.1145/2984393.2984414","mag":"2531634699"},"language":"en","primary_location":{"id":"doi:10.1145/2984393.2984414","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2984393.2984414","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the SouthEast European Design Automation, Computer Engineering, Computer Networks and Social Media Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088825979","display_name":"Georgios Ioannis Paliaroutis","orcid":null},"institutions":[{"id":"https://openalex.org/I145722265","display_name":"University of Thessaly","ror":"https://ror.org/04v4g9h31","country_code":"GR","type":"education","lineage":["https://openalex.org/I145722265"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Georgios Ioannis Paliaroutis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Thessaly, Volos, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Thessaly, Volos, Greece","institution_ids":["https://openalex.org/I145722265"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039792365","display_name":"Pelopidas Tsoumanis","orcid":null},"institutions":[{"id":"https://openalex.org/I145722265","display_name":"University of Thessaly","ror":"https://ror.org/04v4g9h31","country_code":"GR","type":"education","lineage":["https://openalex.org/I145722265"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Pelopidas Tsoumanis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Thessaly, Volos, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Thessaly, Volos, Greece","institution_ids":["https://openalex.org/I145722265"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000207285","display_name":"George Dimitriou","orcid":null},"institutions":[{"id":"https://openalex.org/I145722265","display_name":"University of Thessaly","ror":"https://ror.org/04v4g9h31","country_code":"GR","type":"education","lineage":["https://openalex.org/I145722265"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Dimitriou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, and Department of Computer Science, University of Thessaly, Volos, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, and Department of Computer Science, University of Thessaly, Volos, Greece","institution_ids":["https://openalex.org/I145722265"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065041833","display_name":"Georgios Stamoulis","orcid":"https://orcid.org/0000-0001-7248-8197"},"institutions":[{"id":"https://openalex.org/I145722265","display_name":"University of Thessaly","ror":"https://ror.org/04v4g9h31","country_code":"GR","type":"education","lineage":["https://openalex.org/I145722265"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Georgios I. Stamoulis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, and Department of Computer Science, University of Thessaly, Volos, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, and Department of Computer Science, University of Thessaly, Volos, Greece","institution_ids":["https://openalex.org/I145722265"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5088825979"],"corresponding_institution_ids":["https://openalex.org/I145722265"],"apc_list":null,"apc_paid":null,"fwci":0.3729,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.66871547,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"8","issue":null,"first_page":"36","last_page":"41"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.8486183881759644},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.693679690361023},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.6504054665565491},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5436406135559082},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5331952571868896},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5321502089500427},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5004193782806396},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.49483150243759155},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.4789769649505615},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4713549017906189},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4597568213939667},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.4479790925979614},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4375775158405304},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.43331393599510193},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37553471326828003},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.21445322036743164},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17684200406074524},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1640411615371704},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13950097560882568},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.1391790211200714},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.0932384729385376}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.8486183881759644},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.693679690361023},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.6504054665565491},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5436406135559082},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5331952571868896},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5321502089500427},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5004193782806396},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.49483150243759155},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4789769649505615},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4713549017906189},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4597568213939667},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.4479790925979614},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4375775158405304},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.43331393599510193},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37553471326828003},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.21445322036743164},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17684200406074524},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1640411615371704},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13950097560882568},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.1391790211200714},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0932384729385376},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2984393.2984414","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2984393.2984414","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the SouthEast European Design Automation, Computer Engineering, Computer Networks and Social Media Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:ir.lib.uth.gr:11615/77434","is_oa":false,"landing_page_url":"http://hdl.handle.net/11615/77434","pdf_url":null,"source":{"id":"https://openalex.org/S4306400243","display_name":"University of Thessaly Institutional Repository (University of Thessaly)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I145722265","host_organization_name":"University of Thessaly","host_organization_lineage":["https://openalex.org/I145722265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ACM International Conference Proceeding Series","raw_type":"conferenceItem"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1524889999","https://openalex.org/W2020872704","https://openalex.org/W2030501553","https://openalex.org/W2044444099","https://openalex.org/W2089244748","https://openalex.org/W2098426274","https://openalex.org/W2098864349","https://openalex.org/W2100250713","https://openalex.org/W2115931082","https://openalex.org/W2117115814","https://openalex.org/W2122526433","https://openalex.org/W2137622276","https://openalex.org/W2140388451","https://openalex.org/W2146543277","https://openalex.org/W2162318113","https://openalex.org/W2162817459","https://openalex.org/W2296007654","https://openalex.org/W2399149961","https://openalex.org/W3144849580","https://openalex.org/W6680292773"],"related_works":["https://openalex.org/W2531550288","https://openalex.org/W2044069930","https://openalex.org/W2149041233","https://openalex.org/W2171347834","https://openalex.org/W2066042903","https://openalex.org/W3040935927","https://openalex.org/W2075328278","https://openalex.org/W2078707653","https://openalex.org/W1993206924","https://openalex.org/W2518564956"],"abstract_inverted_index":{"In":[0],"the":[1,17,41,47,75,82,91],"VLSI":[2],"field,":[3],"reliability":[4],"of":[5,43,84,101],"chips":[6,22],"is":[7,35],"a":[8,52,99],"major":[9],"issue":[10],"and":[11,65],"it":[12,34],"becomes":[13],"more":[14],"significant":[15],"considering":[16],"continuous":[18],"technology":[19],"down-scaling.":[20],"Modern":[21],"are":[23],"extremely":[24],"sensitive":[25],"to":[26,37,46,80],"various":[27],"factors":[28],"such":[29],"as":[30],"radiation":[31],"and,":[32],"thus,":[33],"crucial":[36],"implement":[38],"tools":[39],"for":[40,58],"evaluation":[42],"their":[44],"vulnerability":[45],"aforementioned":[48],"hazards.":[49],"We":[50],"present":[51],"Soft":[53],"Error":[54],"Rate":[55],"estimation":[56],"methodology":[57],"sequential":[59,92],"circuits,":[60],"based":[61],"on":[62],"Monte-Carlo":[63],"simulations":[64],"taking":[66],"into":[67],"account":[68],"Multiple":[69],"Event":[70],"Transients.":[71],"Our":[72],"tool":[73],"incorporates":[74],"masking":[76],"effects":[77],"in":[78],"order":[79],"quantify":[81],"number":[83],"transients":[85],"that":[86],"will":[87],"be":[88],"latched":[89],"from":[90],"elements.":[93],"The":[94],"verification":[95],"with":[96],"HSPICE":[97],"shows":[98],"deviation":[100],"about":[102],"10%.":[103]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2016-10-21T00:00:00"}
