{"id":"https://openalex.org/W2513284613","doi":"https://doi.org/10.1145/2970276.2970280","title":"Model driven design of heterogeneous synchronous embedded systems","display_name":"Model driven design of heterogeneous synchronous embedded systems","publication_year":2016,"publication_date":"2016-08-25","ids":{"openalex":"https://openalex.org/W2513284613","doi":"https://doi.org/10.1145/2970276.2970280","mag":"2513284613"},"language":"en","primary_location":{"id":"doi:10.1145/2970276.2970280","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2970276.2970280","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st IEEE/ACM International Conference on Automated Software Engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100603597","display_name":"Huafeng Zhang","orcid":"https://orcid.org/0000-0003-2400-5941"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Huafeng Zhang","raw_affiliation_strings":["Tsinghua University, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060117799","display_name":"Yu Jiang","orcid":"https://orcid.org/0000-0003-0955-503X"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Jiang","raw_affiliation_strings":["University of Illinois at Urbana-Champaign, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois at Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100349041","display_name":"Han Liu","orcid":"https://orcid.org/0000-0002-3051-1990"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Han Liu","raw_affiliation_strings":["Tsinghua University, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076126132","display_name":"Hehua Zhang","orcid":"https://orcid.org/0000-0001-7105-3204"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hehua Zhang","raw_affiliation_strings":["Tsinghua University, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100846520","display_name":"Ming Gu","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Gu","raw_affiliation_strings":["Tsinghua University, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100429010","display_name":"Jiaguang Sun","orcid":"https://orcid.org/0000-0002-5884-7939"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiaguang Sun","raw_affiliation_strings":["Tsinghua University, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5100603597"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.3153,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.57269137,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"774","last_page":"779"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8169150352478027},{"id":"https://openalex.org/keywords/executable","display_name":"Executable","score":0.7778598070144653},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5599039196968079},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.5517779588699341},{"id":"https://openalex.org/keywords/code-generation","display_name":"Code generation","score":0.5117899775505066},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4752205014228821},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4734099805355072},{"id":"https://openalex.org/keywords/abstract-state-machines","display_name":"Abstract state machines","score":0.41383081674575806},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.40745750069618225},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26436060667037964},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.17952242493629456}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8169150352478027},{"id":"https://openalex.org/C160145156","wikidata":"https://www.wikidata.org/wiki/Q778586","display_name":"Executable","level":2,"score":0.7778598070144653},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5599039196968079},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5517779588699341},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.5117899775505066},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4752205014228821},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4734099805355072},{"id":"https://openalex.org/C145243422","wikidata":"https://www.wikidata.org/wiki/Q333385","display_name":"Abstract state machines","level":3,"score":0.41383081674575806},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.40745750069618225},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26436060667037964},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.17952242493629456},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2970276.2970280","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2970276.2970280","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st IEEE/ACM International Conference on Automated Software Engineering","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1496267491","https://openalex.org/W1499488621","https://openalex.org/W1501640954","https://openalex.org/W1567551938","https://openalex.org/W1989922495","https://openalex.org/W2033593612","https://openalex.org/W2067381069","https://openalex.org/W2088096295","https://openalex.org/W2138612658","https://openalex.org/W2143993933","https://openalex.org/W2334760274","https://openalex.org/W2342431457","https://openalex.org/W6629772764"],"related_works":["https://openalex.org/W146887057","https://openalex.org/W2391435730","https://openalex.org/W2381282135","https://openalex.org/W2098353690","https://openalex.org/W4251237796","https://openalex.org/W2371707945","https://openalex.org/W2348641362","https://openalex.org/W2537479781","https://openalex.org/W2384030275","https://openalex.org/W2906490231"],"abstract_inverted_index":{"Synchronous":[0],"embedded":[1],"systems":[2],"are":[3,10,103,139],"becoming":[4],"more":[5,7],"and":[6,9,32,55,62,86,100,105,154,173],"complicated":[8],"usually":[11],"implemented":[12,104],"with":[13,81],"integrated":[14,107],"hardware/software":[15],"solutions.":[16],"This":[17],"implementation":[18],"manner":[19],"brings":[20],"new":[21],"challenges":[22],"to":[23,50,116],"the":[24,52,58,66,92,109,117,126,137,145,150,162],"traditional":[25],"model-driven":[26],"design":[27,118],"environments":[28],"such":[29],"as":[30],"SCADE":[31],"STATEMATE,":[33],"that":[34,160],"supports":[35],"pure":[36],"hardware":[37],"or":[38,134],"software":[39],"design.":[40],"In":[41],"this":[42],"paper,":[43],"we":[44,113],"propose":[45],"a":[46,75,120],"co-design":[47],"tool":[48],"Tsmart-Edola":[49,115,158],"facilitate":[51],"system":[53,78,147],"developers,":[54],"automatically":[56],"generate":[57],"executable":[59],"VHDL":[60,152],"code":[61,64,101,153,156,175],"C":[63,155],"from":[65],"for-":[67],"mal":[68],"verified":[69],"SyncBlock":[70,73],"computation":[71],"model.":[72,148],"is":[74],"lightweight":[76],"high-level":[77],"specification":[79],"model":[80,94],"well":[82],"defined":[83],"syntax,":[84],"simulation":[85],"formal":[87,142],"semantics.":[88],"Based":[89],"on":[90,125],"which,":[91],"graphical":[93,96],"editor,":[95],"simulator,":[97],"verification":[98,143],"translator,":[99],"generator":[102],"seamlessly":[106],"into":[108],"Tsmart-Edola.":[110],"For":[111],"evaluation,":[112],"apply":[114],"of":[119,144,157,161,167],"real-world":[121],"train":[122],"controller":[123],"based":[124],"international":[127],"standard":[128,138],"IEC":[129],"61375.":[130],"Several":[131],"critical":[132],"ambiguousness":[133],"bugs":[135],"in":[136,165],"detected":[140],"during":[141],"constructed":[146],"Furthermore,":[149],"generated":[151],"outperform":[159],"state-of-the-art":[163],"tools":[164],"terms":[166],"synthesized":[168],"gate":[169],"array":[170],"resource":[171],"consumption":[172],"binary":[174],"size.":[176]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
