{"id":"https://openalex.org/W2519508165","doi":"https://doi.org/10.1145/2967878.2967889","title":"Power and Energy Efficient Standard Cells with CDM Logic Style for Optimization of Multiplier Structures","display_name":"Power and Energy Efficient Standard Cells with CDM Logic Style for Optimization of Multiplier Structures","publication_year":2016,"publication_date":"2016-07-06","ids":{"openalex":"https://openalex.org/W2519508165","doi":"https://doi.org/10.1145/2967878.2967889","mag":"2519508165"},"language":"en","primary_location":{"id":"doi:10.1145/2967878.2967889","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2967878.2967889","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 7th International Conference on Computing Communication and Networking Technologies","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043640558","display_name":"Mahdieh Grailoo","orcid":"https://orcid.org/0000-0003-1823-4211"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mahdieh Grailoo","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, University of Tehran, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, University of Tehran, Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035493651","display_name":"Ashish Joshi","orcid":"https://orcid.org/0000-0003-3731-7514"},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ashish Joshi","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX","institution_ids":["https://openalex.org/I12315562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015907653","display_name":"Mounika Mulkalapally","orcid":null},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mounika Mulkalapally","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX","institution_ids":["https://openalex.org/I12315562"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051431139","display_name":"Tooraj Nikoubin","orcid":"https://orcid.org/0000-0003-1724-3503"},"institutions":[{"id":"https://openalex.org/I12315562","display_name":"Texas Tech University","ror":"https://ror.org/0405mnx93","country_code":"US","type":"education","lineage":["https://openalex.org/I12315562"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tooraj Nikoubin","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, Texas Tech University, Lubbock, TX","institution_ids":["https://openalex.org/I12315562"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.08596769,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.7778842449188232},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.6245138645172119},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6005585789680481},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5786911845207214},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5572009086608887},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5208643078804016},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5158559679985046},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.482713907957077},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4777366518974304},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3069772720336914},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28332164883613586},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.205162912607193},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0857890248298645}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.7778842449188232},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.6245138645172119},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6005585789680481},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5786911845207214},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5572009086608887},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5208643078804016},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5158559679985046},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.482713907957077},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4777366518974304},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3069772720336914},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28332164883613586},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.205162912607193},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0857890248298645},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2967878.2967889","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2967878.2967889","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 7th International Conference on Computing Communication and Networking Technologies","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W566978853","https://openalex.org/W1518236483","https://openalex.org/W1520275403","https://openalex.org/W1592742020","https://openalex.org/W1976534270","https://openalex.org/W1988068558","https://openalex.org/W2017962632","https://openalex.org/W2024106453","https://openalex.org/W2076654948","https://openalex.org/W2078264763","https://openalex.org/W2110826476","https://openalex.org/W2124278579","https://openalex.org/W2128252711","https://openalex.org/W2131107384","https://openalex.org/W2144038159","https://openalex.org/W2154763313","https://openalex.org/W4252936885"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2373777250","https://openalex.org/W2353956655","https://openalex.org/W2059812140","https://openalex.org/W2610514210","https://openalex.org/W90892980","https://openalex.org/W1986441503","https://openalex.org/W2757604236"],"abstract_inverted_index":{"Owning":[0],"to":[1,28,132,272,276],"rapid":[2],"growth":[3],"in":[4,42,56,109,166,183,196,211,224,267,279],"standard-cell-based":[5],"synthesized":[6],"designs;":[7],"the":[8,20,49,65,75,79,82,87,103,124,144,150,160,175,178,190,193,197,203,225,233,237,254,258,262,285],"efficiency":[9,176],"of":[10,86,102,123,143,177,192,199,207,232,253,261],"standard":[11,200,204,287],"cells":[12,88,97,151,158,201,234,264],"has":[13,25,89,117,181],"increasingly":[14],"become":[15],"important.":[16],"In":[17,112],"this":[18,113,187],"line,":[19],"Cell":[21],"Design":[22,246],"Methodology":[23],"(CDM)":[24],"systematically":[26],"meditated":[27],"present":[29],"some":[30],"new":[31,194,263],"efficient":[32],"designs":[33,180],"such":[34],"as":[35,59,61,71,169],"three":[36],"2-input":[37],"XORs":[38],"and":[39,52,78,84,127,213,221,235,245],"full":[40],"adder":[41],"hybrid":[43],"CMOS":[44],"logic":[45,172],"style":[46],"which":[47,106,274],"are":[48,147,249,265],"most":[50],"significant":[51],"crucial":[53],"building":[54],"block":[55],"arithmetic":[57],"units":[58],"well":[60],"multiplier":[62],"structures.":[63,111],"For":[64],"best":[66],"cell":[67,139,205,288],"design,":[68],"energy":[69],"considered":[70],"optimization":[72],"parameter":[73],"for":[74,98,138,149],"transistor":[76],"sizing":[77],"trade-off":[80],"between":[81],"PDP":[83,116,135,162],"driveability":[85],"been":[90,118],"investigated.":[91],"The":[92,251],"goal":[93],"is":[94,107,136],"finding":[95],"energy-efficient":[96],"an":[99],"expected":[100],"range":[101],"output":[104],"loads":[105],"essential":[108],"multi-stage":[110],"way,":[114],"average":[115,134],"calculated":[119],"at":[120],"each":[121],"value":[122],"load":[125,129,145,167],"capacitance":[126,130,146,168],"finally":[128],"corresponding":[131],"minimum":[133,161],"selected":[137,148],"sizing.":[140],"Different":[141],"ranges":[142],"with":[152,164,170,283],"different":[153],"drive":[154],"capability.":[155],"Therefore":[156],"designed":[157],"shows":[159,256],"variation":[163,165],"multistage":[171],"synthesis.":[173],"While":[174],"proposed":[179],"confirmed":[182],"many":[184],"test":[185],"benches,":[186],"work":[188],"evaluates":[189],"performance":[191],"circuits":[195],"form":[198],"besides":[202],"library":[206,289],"TSMC":[208],"130nm":[209],"technology":[210],"real":[212],"more":[214],"practical":[215],"structures":[216,269],"like":[217],"8-bit,":[218],"16-bit,":[219],"32-bit,":[220],"64-bit":[222],"multipliers":[223],"layout":[226],"level.":[227],"To":[228],"size,":[229],"characterize,":[230],"simulate":[231],"compile":[236],"structures,":[238],"HSPICE,":[239],"Encounter":[240],"Library":[241],"Characterizer":[242],"(ELC),":[243],"SPECTRE,":[244],"Compiler":[247],"(DC)":[248],"employed.":[250],"result":[252],"analysis":[255],"that":[257],"contribution":[259],"percentage":[260],"increasing":[266],"larger":[268],"from":[270],"15.2%":[271],"19.8%":[273],"leads":[275],"3%-49.3%":[277],"improvement":[278],"power-delay":[280],"product":[281],"compared":[282],"using":[284],"regular":[286],"solely.":[290]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}