{"id":"https://openalex.org/W2509453741","doi":"https://doi.org/10.1145/2953878","title":"Cycle-Accurate Network on Chip Simulation with Noxim","display_name":"Cycle-Accurate Network on Chip Simulation with Noxim","publication_year":2016,"publication_date":"2016-08-16","ids":{"openalex":"https://openalex.org/W2509453741","doi":"https://doi.org/10.1145/2953878","mag":"2509453741"},"language":"en","primary_location":{"id":"doi:10.1145/2953878","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2953878","pdf_url":null,"source":{"id":"https://openalex.org/S38703467","display_name":"ACM Transactions on Modeling and Computer Simulation","issn_l":"1049-3301","issn":["1049-3301","1558-1195"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Modeling and Computer Simulation","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101778204","display_name":"Vincenzo Catania","orcid":"https://orcid.org/0000-0002-5040-3540"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Vincenzo Catania","raw_affiliation_strings":["University of Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027586591","display_name":"Andrea Mineo","orcid":null},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Mineo","raw_affiliation_strings":["University of Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063266729","display_name":"Salvatore Monteleone","orcid":"https://orcid.org/0000-0003-0158-2295"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Monteleone","raw_affiliation_strings":["University of Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010989172","display_name":"Maurizio Palesi","orcid":"https://orcid.org/0000-0003-3129-0664"},"institutions":[{"id":"https://openalex.org/I246010334","display_name":"Universit\u00e0 degli Studi di Enna Kore","ror":"https://ror.org/04vd28p53","country_code":"IT","type":"education","lineage":["https://openalex.org/I246010334"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Maurizio Palesi","raw_affiliation_strings":["Kore University of Enna, Enna, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Kore University of Enna, Enna, Italy","institution_ids":["https://openalex.org/I246010334"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001962324","display_name":"Davide Patti","orcid":"https://orcid.org/0000-0003-0874-7793"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Patti","raw_affiliation_strings":["University of Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":27.4808,"has_fulltext":false,"cited_by_count":222,"citation_normalized_percentile":{"value":0.99722089,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"27","issue":"1","first_page":"1","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.8249099254608154},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7506182193756104},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7427113652229309},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.7190731763839722},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7119531631469727},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6398978233337402},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.555915117263794},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5136129856109619},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5104602575302124},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5089340209960938},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.4670872390270233},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.44563931226730347},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.4124358594417572},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3670542240142822},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.33636999130249023},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.15643534064292908},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11839437484741211}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.8249099254608154},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7506182193756104},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7427113652229309},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.7190731763839722},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7119531631469727},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6398978233337402},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.555915117263794},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5136129856109619},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5104602575302124},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5089340209960938},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.4670872390270233},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.44563931226730347},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.4124358594417572},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3670542240142822},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.33636999130249023},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.15643534064292908},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11839437484741211},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.0},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2953878","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2953878","pdf_url":null,"source":{"id":"https://openalex.org/S38703467","display_name":"ACM Transactions on Modeling and Computer Simulation","issn_l":"1049-3301","issn":["1049-3301","1558-1195"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Modeling and Computer Simulation","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W232514413","https://openalex.org/W1501077214","https://openalex.org/W1505822854","https://openalex.org/W1513692385","https://openalex.org/W1969899927","https://openalex.org/W1984332084","https://openalex.org/W1998037535","https://openalex.org/W2002123074","https://openalex.org/W2010999572","https://openalex.org/W2013018754","https://openalex.org/W2026106267","https://openalex.org/W2032281403","https://openalex.org/W2039914327","https://openalex.org/W2048031428","https://openalex.org/W2073949335","https://openalex.org/W2109492692","https://openalex.org/W2109748228","https://openalex.org/W2111361097","https://openalex.org/W2118231264","https://openalex.org/W2118961575","https://openalex.org/W2123184444","https://openalex.org/W2142127152","https://openalex.org/W2142453689","https://openalex.org/W2143303417","https://openalex.org/W2161755212","https://openalex.org/W2163046274","https://openalex.org/W2164363230","https://openalex.org/W2171825402","https://openalex.org/W2171878649","https://openalex.org/W2316824423","https://openalex.org/W2540500304","https://openalex.org/W2607974288","https://openalex.org/W4231104284","https://openalex.org/W4237091799"],"related_works":["https://openalex.org/W1934552808","https://openalex.org/W2587830891","https://openalex.org/W3198758847","https://openalex.org/W4230458348","https://openalex.org/W2388672758","https://openalex.org/W1581055755","https://openalex.org/W2144357574","https://openalex.org/W1966325333","https://openalex.org/W3117657225","https://openalex.org/W3141352748"],"abstract_inverted_index":{"The":[0],"on-chip":[1,45],"communication":[2,46,86],"in":[3,87,129],"current":[4],"Chip-MultiProcessors":[5],"(CMP)":[6],"and":[7,32,94,99,137,145],"MultiProcessor-SoC":[8],"(MPSoC)":[9],"is":[10,21],"mainly":[11],"based":[12],"on":[13,112],"the":[14,29,37,60,92,103,135],"Network-on-Chip":[15],"(NoC)":[16],"design":[17],"paradigm.":[18],"Unfortunately,":[19],"it":[20],"foreseen":[22],"that":[23,108],"conventional":[24,64,142],"NoC":[25,66,98,126,144],"architectures":[26,101],"cannot":[27],"sustain":[28],"performance,":[30],"power,":[31],"reliability":[33],"requirements":[34],"demanded":[35],"by":[36],"next":[38],"generation":[39],"of":[40,63,73,97,105,140],"manycore":[41],"architectures.":[42,67,148],"Recently,":[43],"emerging":[44,146],"technologies,":[47],"like":[48],"wireless":[49,80],"Networks-on-Chip":[50],"(WiNoCs),":[51],"have":[52],"been":[53],"proposed":[54],"as":[55],"candidate":[56],"solutions":[57],"for":[58],"addressing":[59],"scalability":[61],"limitations":[62],"multi-hop":[65],"In":[68],"a":[69,71,79,88],"WiNoC,":[70],"subset":[72],"network":[74,115],"nodes":[75],"are":[76,109],"equipped":[77],"with":[78],"interface":[81],"which":[82,131],"allows":[83,132],"them":[84],"long-range":[85],"single":[89],"hop.":[90],"Assessing":[91],"performance":[93,136],"power":[95,138],"figures":[96,139],"WiNoC":[100,147],"requires":[102],"availability":[104],"simulation":[106],"tools":[107],"often":[110],"limited":[111],"modeling":[113],"specific":[114],"configurations.":[116],"This":[117],"article":[118],"presents":[119],"Noxim,":[120],"an":[121],"open,":[122],"configurable,":[123],"extendible,":[124],"cycle-accurate":[125],"simulator":[127],"developed":[128],"SystemC,":[130],"to":[133],"analyze":[134],"both":[141],"wired":[143]},"counts_by_year":[{"year":2026,"cited_by_count":7},{"year":2025,"cited_by_count":12},{"year":2024,"cited_by_count":15},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":21},{"year":2021,"cited_by_count":25},{"year":2020,"cited_by_count":34},{"year":2019,"cited_by_count":44},{"year":2018,"cited_by_count":33},{"year":2017,"cited_by_count":20},{"year":2015,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}