{"id":"https://openalex.org/W2491605793","doi":"https://doi.org/10.1145/2948618.2948624","title":"A Formal Security Analysis of Even-Odd Sequential Prefetching in Profiled Cache-Timing Attacks","display_name":"A Formal Security Analysis of Even-Odd Sequential Prefetching in Profiled Cache-Timing Attacks","publication_year":2016,"publication_date":"2016-06-18","ids":{"openalex":"https://openalex.org/W2491605793","doi":"https://doi.org/10.1145/2948618.2948624","mag":"2491605793"},"language":"en","primary_location":{"id":"doi:10.1145/2948618.2948624","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2948618.2948624","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Hardware and Architectural Support for Security and Privacy 2016","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101816833","display_name":"Sarani Bhattacharya","orcid":"https://orcid.org/0000-0002-4190-2671"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sarani Bhattacharya","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038432102","display_name":"Chester Rebeiro","orcid":"https://orcid.org/0000-0001-8063-0026"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Chester Rebeiro","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Madras, Madras, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Madras, Madras, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078971402","display_name":"Debdeep Mukhopadhyay","orcid":"https://orcid.org/0000-0002-6499-8346"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Debdeep Mukhopadhyay","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101816833"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":1.2854,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.86799857,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8332966566085815},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7410458922386169},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7039163112640381},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5978496074676514},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4481281340122223},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4115341603755951},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3437705934047699},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.29537004232406616}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8332966566085815},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7410458922386169},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7039163112640381},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5978496074676514},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4481281340122223},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4115341603755951},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3437705934047699},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.29537004232406616}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2948618.2948624","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2948618.2948624","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Hardware and Architectural Support for Security and Privacy 2016","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W23755936","https://openalex.org/W404524222","https://openalex.org/W1492601037","https://openalex.org/W1499081748","https://openalex.org/W1548516269","https://openalex.org/W1549794385","https://openalex.org/W1877746997","https://openalex.org/W1965555277","https://openalex.org/W1996007243","https://openalex.org/W2011257923","https://openalex.org/W2405497270","https://openalex.org/W2725179571","https://openalex.org/W2788962374"],"related_works":["https://openalex.org/W2167303720","https://openalex.org/W2549803267","https://openalex.org/W2497617944","https://openalex.org/W1563139915","https://openalex.org/W2061075966","https://openalex.org/W3147501184","https://openalex.org/W4256652509","https://openalex.org/W2109715593","https://openalex.org/W2081416538","https://openalex.org/W2140219379"],"abstract_inverted_index":{"Hardware":[0],"cache":[1],"prefetching":[2,34,80],"has":[3,42],"a":[4,62],"profound":[5],"impact":[6],"on":[7,47],"the":[8,48,51,56,67],"memory":[9,28,73],"access":[10,29],"pattern":[11],"of":[12,50],"ciphers":[13],"which":[14,82],"are":[15,83],"exploited":[16],"in":[17,55,75],"profiled":[18],"cache-timing":[19],"attacks.":[20],"In":[21],"this":[22],"paper,":[23],"we":[24],"formally":[25],"demonstrate":[26],"that":[27,61],"patterns":[30],"influenced":[31],"by":[32],"sequential":[33],"and":[35],"its":[36],"variant,":[37],"known":[38],"as":[39],"even-odd":[40],"prefetcher":[41,69],"varying":[43],"information":[44],"leakage":[45,84],"dependent":[46],"alignment":[49,74],"underlying":[52],"tables":[53],"used":[54],"cipher":[57],"implementation.":[58],"This":[59],"demonstrates":[60],"suitable":[63],"architecture":[64],"choice":[65],"for":[66],"hardware":[68],"combined":[70],"with":[71],"appropriate":[72],"software":[76],"can":[77],"lead":[78],"to":[79],"architectures":[81],"resilient.":[85]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
