{"id":"https://openalex.org/W2496696154","doi":"https://doi.org/10.1145/2934583.2934633","title":"FVCAG","display_name":"FVCAG","publication_year":2016,"publication_date":"2016-07-29","ids":{"openalex":"https://openalex.org/W2496696154","doi":"https://doi.org/10.1145/2934583.2934633","mag":"2496696154"},"language":"en","primary_location":{"id":"doi:10.1145/2934583.2934633","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2934583.2934633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031339747","display_name":"Arun Joseph","orcid":"https://orcid.org/0000-0003-4685-8929"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Arun Joseph","raw_affiliation_strings":["IBM Systems Group, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"IBM Systems Group, Bangalore, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057555942","display_name":"Spandana Rachamalla","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Spandana Rachamalla","raw_affiliation_strings":["IBM Systems Group, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"IBM Systems Group, Bangalore, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103068738","display_name":"Rahul Rao","orcid":"https://orcid.org/0000-0002-7784-7029"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rahul M. Rao","raw_affiliation_strings":["IBM Systems Group, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"IBM Systems Group, Bangalore, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090401533","display_name":"A. Haridass","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anand Haridass","raw_affiliation_strings":["IBM Systems Group, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"IBM Systems Group, Bangalore, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022136602","display_name":"Pradeep K. Nalla","orcid":null},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pradeep K. Nalla","raw_affiliation_strings":["IBM Systems Group, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"IBM Systems Group, Bangalore, India","institution_ids":["https://openalex.org/I4210129961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5031339747"],"corresponding_institution_ids":["https://openalex.org/I4210129961"],"apc_list":null,"apc_paid":null,"fwci":0.3153,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56704909,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"260","last_page":"265"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7946784496307373},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.6405194997787476},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5947695970535278},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.5947363376617432},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4687754213809967},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.4471552073955536},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4180332124233246},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.4139222204685211},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4088049530982971},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39960983395576477},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34381234645843506},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.33826667070388794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14182618260383606},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11582931876182556},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08782249689102173}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7946784496307373},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.6405194997787476},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5947695970535278},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.5947363376617432},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4687754213809967},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.4471552073955536},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4180332124233246},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.4139222204685211},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4088049530982971},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39960983395576477},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34381234645843506},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.33826667070388794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14182618260383606},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11582931876182556},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08782249689102173},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2934583.2934633","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2934583.2934633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5799999833106995}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1973665222","https://openalex.org/W1988099667","https://openalex.org/W2010719306","https://openalex.org/W2054166664","https://openalex.org/W2054716548","https://openalex.org/W2056458499","https://openalex.org/W2078460947","https://openalex.org/W2098560306","https://openalex.org/W2102727118","https://openalex.org/W2120072298","https://openalex.org/W2132471117"],"related_works":["https://openalex.org/W2030816003","https://openalex.org/W4239992647","https://openalex.org/W2150013480","https://openalex.org/W39373273","https://openalex.org/W1554458299","https://openalex.org/W2076325756","https://openalex.org/W81423522","https://openalex.org/W2157190039","https://openalex.org/W1841334895","https://openalex.org/W4385080093"],"abstract_inverted_index":{"Generation":[0],"of":[1,8,17,24,70,83,132,138,153,166],"accurate":[2,113],"IP":[3,28,51,121],"power":[4,114,122],"models":[5],"requires":[6],"determination":[7],"correct":[9],"simulation":[10,58],"conditions":[11,59],"for":[12,26,109],"the":[13,18,68,133,139,143,151,162],"different":[14],"input":[15],"pins":[16],"IP.":[19],"Determining":[20],"such":[21],"a":[22,31,54,79,107,118],"set":[23],"inputs":[25],"individual":[27],"blocks":[29],"in":[30,35,53,67,100,150],"design":[32,152,160],"is":[33,40,47],"expensive":[34],"cost":[36],"and":[37,39,104,112,147,164],"time,":[38],"also":[41],"highly":[42],"error":[43],"prone.":[44],"Additionally,":[45],"it":[46],"desirable":[48],"to":[49],"identify":[50],"instances":[52],"design,":[55],"where":[56],"these":[57,98],"are":[60,64,76],"not":[61],"met.":[62],"These":[63],"relevant":[65],"problems":[66,99],"context":[69,103],"modern":[71],"day":[72],"microprocessor":[73,159],"designs,":[74],"which":[75],"designed":[77],"using":[78,129],"very":[80],"large":[81],"number":[82],"IPs,":[84],"either":[85],"developed":[86],"in-house":[87],"or":[88],"sourced":[89],"from":[90],"external":[91],"vendors.":[92],"In":[93],"this":[94],"paper,":[95],"we":[96],"examine":[97],"an":[101,154],"industrial":[102],"introduce":[105],"FVCAG,":[106],"framework":[108,141],"enabling":[110],"efficient":[111],"modelling.":[115],"FVCAG":[116],"enables":[117],"more":[119],"thorough":[120],"modelling":[123],"than":[124],"that":[125],"can":[126],"be":[127],"accomplished":[128],"current":[130],"state":[131],"art":[134],"techniques.":[135],"Experimental":[136],"evaluation":[137],"proposed":[140,167],"on":[142],"standard":[144],"cell":[145],"library":[146],"macros":[148],"used":[149],"industry":[155],"class":[156],"high":[157],"performance":[158],"demonstrates":[161],"accuracy":[163],"efficiency":[165],"framework.":[168]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-08-23T00:00:00"}