{"id":"https://openalex.org/W2409197925","doi":"https://doi.org/10.1145/2925426.2926282","title":"Prefetching Techniques for Near-memory Throughput Processors","display_name":"Prefetching Techniques for Near-memory Throughput Processors","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2409197925","doi":"https://doi.org/10.1145/2925426.2926282","mag":"2409197925"},"language":"en","primary_location":{"id":"doi:10.1145/2925426.2926282","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2925426.2926282","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 International Conference on Supercomputing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102099267","display_name":"Reena Panda","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Reena Panda","raw_affiliation_strings":["University of Texas at Austin"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087189119","display_name":"Yasuko Eckert","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yasuko Eckert","raw_affiliation_strings":["AMD Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AMD Research","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060736283","display_name":"Nuwan Jayasena","orcid":"https://orcid.org/0009-0005-2973-9479"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nuwan Jayasena","raw_affiliation_strings":["AMD Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AMD Research","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064126781","display_name":"Onur Kay\u0131ran","orcid":"https://orcid.org/0009-0006-4482-3115"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Onur Kayiran","raw_affiliation_strings":["AMD Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AMD Research","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101813139","display_name":"Michael Boyer","orcid":"https://orcid.org/0009-0007-8764-6021"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michael Boyer","raw_affiliation_strings":["AMD Research"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"AMD Research","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068885069","display_name":"Lizy K. John","orcid":"https://orcid.org/0000-0002-8747-5214"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lizy Kurian John","raw_affiliation_strings":["University of Texas at Austin"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.3447,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.77409225,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"14"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/instruction-prefetch","display_name":"Instruction prefetch","score":0.9652624130249023},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8589702844619751},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.6730084419250488},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.6726053953170776},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.661212682723999},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.617914617061615},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5445175766944885},{"id":"https://openalex.org/keywords/thrashing","display_name":"Thrashing","score":0.512304425239563},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.5029787421226501},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.4989292621612549},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4967268109321594},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.49516192078590393},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4891839325428009},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4874684810638428},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.48163357377052307},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.42866426706314087},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38369429111480713},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24031725525856018},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21063610911369324},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.14365583658218384}],"concepts":[{"id":"https://openalex.org/C133588205","wikidata":"https://www.wikidata.org/wiki/Q28455645","display_name":"Instruction prefetch","level":3,"score":0.9652624130249023},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8589702844619751},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.6730084419250488},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.6726053953170776},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.661212682723999},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.617914617061615},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5445175766944885},{"id":"https://openalex.org/C28362024","wikidata":"https://www.wikidata.org/wiki/Q2067413","display_name":"Thrashing","level":2,"score":0.512304425239563},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.5029787421226501},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.4989292621612549},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4967268109321594},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.49516192078590393},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4891839325428009},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4874684810638428},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.48163357377052307},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.42866426706314087},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38369429111480713},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24031725525856018},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21063610911369324},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.14365583658218384},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2925426.2926282","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2925426.2926282","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 International Conference on Supercomputing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W1968775993","https://openalex.org/W1975237352","https://openalex.org/W1979527452","https://openalex.org/W1979830285","https://openalex.org/W1981943579","https://openalex.org/W1983235612","https://openalex.org/W2006983510","https://openalex.org/W2007964763","https://openalex.org/W2009946006","https://openalex.org/W2021211271","https://openalex.org/W2044155528","https://openalex.org/W2045431893","https://openalex.org/W2048441570","https://openalex.org/W2062527253","https://openalex.org/W2080592089","https://openalex.org/W2086112773","https://openalex.org/W2092324191","https://openalex.org/W2093043622","https://openalex.org/W2094332102","https://openalex.org/W2097215759","https://openalex.org/W2110195531","https://openalex.org/W2112980698","https://openalex.org/W2117610793","https://openalex.org/W2122108187","https://openalex.org/W2122577223","https://openalex.org/W2128060503","https://openalex.org/W2128351153","https://openalex.org/W2129232868","https://openalex.org/W2141443190","https://openalex.org/W2142444503","https://openalex.org/W2149234156","https://openalex.org/W2149412112","https://openalex.org/W2150143212","https://openalex.org/W2152356827","https://openalex.org/W2158630919","https://openalex.org/W2162143448","https://openalex.org/W2162773908","https://openalex.org/W2166620913","https://openalex.org/W2166918318","https://openalex.org/W2537450429","https://openalex.org/W2575538622","https://openalex.org/W2914479353","https://openalex.org/W3138340923","https://openalex.org/W3147011727","https://openalex.org/W6630885905"],"related_works":["https://openalex.org/W2145210935","https://openalex.org/W2170496111","https://openalex.org/W2155373950","https://openalex.org/W3008068282","https://openalex.org/W2044064773","https://openalex.org/W2409197925","https://openalex.org/W2587873888","https://openalex.org/W2138825797","https://openalex.org/W3108993429","https://openalex.org/W2578919162"],"abstract_inverted_index":{"Near-memory":[0],"processing":[1],"or":[2],"processing-in-memory":[3],"(PIM)":[4],"is":[5],"regaining":[6],"a":[7,13,54,125,170,178],"lot":[8],"of":[9,33,79,103,128,160,215,219,225],"interest":[10],"recently":[11],"as":[12,39,206],"viable":[14],"solution":[15],"to":[16,46,61,75,99,132,157,189,208],"overcome":[17],"the":[18,31,77,80,101,110,119,129,166,209,216,233],"challenges":[19],"imposed":[20],"by":[21,30,86,198,238],"memory":[22,58,63,89,114,121],"wall.":[23],"This":[24],"trend":[25],"has":[26],"been":[27],"mainly":[28],"fueled":[29],"emergence":[32],"3D-stacked":[34],"memories.":[35],"GPUs":[36],"are":[37],"touted":[38],"great":[40],"candidates":[41],"for":[42],"in-memory":[43,82],"processors":[44,84],"due":[45],"their":[47,88,191],"superior":[48],"bandwidth":[49],"utilization":[50,159],"capabilities.":[51],"Although":[52],"putting":[53],"GPU":[55,83],"core":[56],"beneath":[57],"exposes":[59],"it":[60],"unprecedented":[62],"bandwidth,":[64],"in":[65,112,118,151],"this":[66],"paper,":[67],"we":[68,92],"demonstrate":[69],"that":[70],"significant":[71],"opportunities":[72],"still":[73],"exist":[74],"improve":[76,100,196],"performance":[78,102,197,217],"simpler,":[81],"(GPU-PIM)":[85],"improving":[87],"performance.":[90],"Thus,":[91],"propose":[93],"three":[94],"light-weight,":[95],"practical":[96],"memory-side":[97,235],"prefetchers":[98,108,167,195,230],"GPU-PIM":[104],"systems.":[105],"The":[106,193,228],"proposed":[107,194,229],"exploit":[109],"patterns":[111],"individual":[113],"accesses":[115],"and":[116,148,163,202],"synergy":[117],"wavefront-localized":[120],"streams,":[122],"combined":[123],"with":[124,184],"better":[126],"understanding":[127],"memory-system":[130],"state,":[131],"prefetch":[133,140,172],"from":[134],"DRAM":[135],"row":[136,152],"buffers":[137],"into":[138],"on-chip":[139],"buffers,":[141],"thereby":[142],"achieving":[143,212],"over":[144,199,213],"75%":[145],"prefetcher":[146],"accuracy":[147],"40%":[149],"improvement":[150],"buffer":[153,173],"locality.":[154],"In":[155],"order":[156],"maximize":[158],"prefetched":[161],"data":[162],"minimize":[164],"thrashing,":[165],"also":[168,231],"use":[169],"novel":[171],"management":[174],"policy":[175,188],"based":[176],"on":[177,204],"unique":[179],"dead-row":[180],"prediction":[181],"mechanism":[182],"together":[183],"an":[185],"eviction-based":[186],"prefetch-trigger":[187],"control":[190],"aggressiveness.":[192],"60%":[200],"(max)":[201],"9%":[203],"average":[205],"compared":[207],"baseline,":[210],"while":[211],"33%":[214],"benefits":[218],"perfect-L2":[220],"using":[221],"less":[222],"than":[223,240],"5.6KB":[224],"additional":[226],"hardware.":[227],"outperform":[232],"state-of-the-art":[234],"prefetcher,":[236],"OWL":[237],"more":[239],"20%.":[241]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}