{"id":"https://openalex.org/W2392523479","doi":"https://doi.org/10.1145/2902961.2902966","title":"MCFRoute 2.0","display_name":"MCFRoute 2.0","publication_year":2016,"publication_date":"2016-05-13","ids":{"openalex":"https://openalex.org/W2392523479","doi":"https://doi.org/10.1145/2902961.2902966","mag":"2392523479"},"language":"en","primary_location":{"id":"doi:10.1145/2902961.2902966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2902961.2902966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101916099","display_name":"Xiaotao Jia","orcid":"https://orcid.org/0000-0003-2207-6092"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xiaotao Jia","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100894724","display_name":"Yici Cai","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yici Cai","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101929509","display_name":"Qiang Zhou","orcid":"https://orcid.org/0000-0003-1348-8861"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiang Zhou","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051340429","display_name":"Bei Yu","orcid":"https://orcid.org/0000-0001-6406-4810"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bei Yu","raw_affiliation_strings":["CSE Department, The Chinese University of Hong Kong, Hong Kong, Hong Kong"],"affiliations":[{"raw_affiliation_string":"CSE Department, The Chinese University of Hong Kong, Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101916099"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.03391249,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.8647538423538208},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6839253902435303},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6402952671051025},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.6017679572105408},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5753294229507446},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4319861829280853},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39552468061447144},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28581851720809937},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2347443401813507},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2191736102104187}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.8647538423538208},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6839253902435303},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6402952671051025},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.6017679572105408},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5753294229507446},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4319861829280853},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39552468061447144},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28581851720809937},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2347443401813507},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2191736102104187},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2902961.2902966","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2902961.2902966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320322942","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1977024562","https://openalex.org/W1982222146","https://openalex.org/W2008074787","https://openalex.org/W2010316445","https://openalex.org/W2017322750","https://openalex.org/W2054938277","https://openalex.org/W2061083860","https://openalex.org/W2075614116","https://openalex.org/W2127254586","https://openalex.org/W2145287211","https://openalex.org/W2148390345","https://openalex.org/W2154881556","https://openalex.org/W2157444680","https://openalex.org/W2168578526","https://openalex.org/W6652518615"],"related_works":["https://openalex.org/W2127180614","https://openalex.org/W4205718258","https://openalex.org/W2167711148","https://openalex.org/W1989674257","https://openalex.org/W4235531327","https://openalex.org/W1603115038","https://openalex.org/W2177095534","https://openalex.org/W1964344619","https://openalex.org/W2163233359","https://openalex.org/W4249446840"],"abstract_inverted_index":{"In":[0,61,112],"modern":[1],"VLSI":[2],"design,":[3],"manufacturing":[4],"yield":[5],"and":[6,43,160,166],"chip":[7],"performance":[8],"are":[9],"seriously":[10],"affected":[11],"by":[12,23,148,163],"via":[13,16,29,49,103,107,145,161],"failure.":[14,30],"Redundant":[15],"insertion":[17,50,146],"is":[18,41],"an":[19,66,116,136],"effective":[20],"technique":[21],"recommended":[22],"foundries":[24],"to":[25,33,46,122],"deal":[26],"with":[27,52],"the":[28,34,125,143],"However,":[31],"due":[32],"extreme":[35],"scaling":[36],"of":[37],"feature":[38],"size,":[39],"it":[40,114,141],"more":[42,44],"difficult":[45],"resolve":[47],"redundant":[48,102,144],"(RVI)":[51],"limited":[53],"routing":[54,110,126],"resource":[55],"while":[56,150],"obeying":[57],"complicated":[58],"design":[59,77,152],"rules.":[60],"this":[62],"paper,":[63],"we":[64],"propose":[65],"RVI":[67,117],"enhanced":[68],"concurrent":[69],"detailed":[70,133],"router,":[71],"MCFRoute":[72],"2.0,":[73],"which":[74],"effectively":[75],"avoids":[76],"rule":[78,153],"violations":[79],"through":[80],"a":[81],"compact":[82],"integer":[83],"linear":[84],"programming":[85],"(ILP)":[86],"model.":[87],"The":[88],"proposed":[89],"router":[90,134],"can":[91],"not":[92],"only":[93],"route":[94],"all":[95,106],"nets":[96],"simultaneously":[97,108],"but":[98],"also":[99],"search":[100],"for":[101,105],"positions":[104],"during":[109],"stage.":[111],"addition,":[113],"proposes":[115],"aware":[118],"pin":[119],"access":[120],"allocation":[121],"further":[123],"improve":[124],"performance.":[127],"Experimental":[128],"results":[129],"show":[130],"that":[131,140],"our":[132],"outperforms":[135],"industry":[137],"EDA":[138],"tool":[139],"improves":[142],"rate":[147],"21%,":[149],"reducing":[151],"checking":[154],"violation":[155],"count,":[156],"total":[157],"wire":[158],"length":[159],"count":[162],"47%,":[164],"4%":[165],"14%,":[167],"respectively.":[168]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
