{"id":"https://openalex.org/W2299668876","doi":"https://doi.org/10.1145/2889490","title":"Evaluating the Design of a VLIW Processor for Real-Time Systems","display_name":"Evaluating the Design of a VLIW Processor for Real-Time Systems","publication_year":2016,"publication_date":"2016-03-07","ids":{"openalex":"https://openalex.org/W2299668876","doi":"https://doi.org/10.1145/2889490","mag":"2299668876"},"language":"en","primary_location":{"id":"doi:10.1145/2889490","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2889490","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043275099","display_name":"Renan Augusto Starke","orcid":"https://orcid.org/0000-0002-6845-344X"},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Renan Augusto Starke","raw_affiliation_strings":["Federal University of Santa Catarina, Santa Catarina, Brazil"],"raw_orcid":"https://orcid.org/0000-0002-6845-344X","affiliations":[{"raw_affiliation_string":"Federal University of Santa Catarina, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084434640","display_name":"Andreu Carminati","orcid":"https://orcid.org/0000-0001-5891-5498"},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Andreu Carminati","raw_affiliation_strings":["Federal University of Santa Catarina, Santa Catarina, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Santa Catarina, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080751827","display_name":"R\u00f4mulo Silva de Oliveira","orcid":"https://orcid.org/0000-0002-8853-9021"},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"R\u00f4mulo Silva De Oliveira","raw_affiliation_strings":["Federal University of Santa Catarina, Santa Catarina, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Santa Catarina, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4104125"],"apc_list":null,"apc_paid":null,"fwci":1.2496,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.77027788,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"15","issue":"3","first_page":"1","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.934430718421936},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.9278700351715088},{"id":"https://openalex.org/keywords/branch-predictor","display_name":"Branch predictor","score":0.7145715951919556},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6626334190368652},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5572404265403748},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"Speculative execution","score":0.5380908846855164},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5245940089225769},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5094109177589417},{"id":"https://openalex.org/keywords/instructions-per-cycle","display_name":"Instructions per cycle","score":0.4632628560066223},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4468129277229309},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.4358386695384979},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.4318387508392334},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40376177430152893},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3898438811302185},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2516546845436096},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.20492446422576904},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.1437893509864807},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.08936366438865662}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.934430718421936},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.9278700351715088},{"id":"https://openalex.org/C168522837","wikidata":"https://www.wikidata.org/wiki/Q679552","display_name":"Branch predictor","level":2,"score":0.7145715951919556},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6626334190368652},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5572404265403748},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.5380908846855164},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5245940089225769},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5094109177589417},{"id":"https://openalex.org/C156972235","wikidata":"https://www.wikidata.org/wiki/Q1443434","display_name":"Instructions per cycle","level":3,"score":0.4632628560066223},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4468129277229309},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.4358386695384979},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.4318387508392334},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40376177430152893},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3898438811302185},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2516546845436096},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.20492446422576904},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.1437893509864807},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.08936366438865662}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2889490","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2889490","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321091","display_name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","ror":"https://ror.org/00x0ma614"},{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W58680384","https://openalex.org/W1506585561","https://openalex.org/W1510808677","https://openalex.org/W1625426655","https://openalex.org/W1715210439","https://openalex.org/W1874478398","https://openalex.org/W1976014094","https://openalex.org/W1978054178","https://openalex.org/W2004788108","https://openalex.org/W2006446104","https://openalex.org/W2033576476","https://openalex.org/W2048395739","https://openalex.org/W2063255488","https://openalex.org/W2077711428","https://openalex.org/W2092376909","https://openalex.org/W2093994565","https://openalex.org/W2102800454","https://openalex.org/W2111379929","https://openalex.org/W2111906340","https://openalex.org/W2119000119","https://openalex.org/W2122666034","https://openalex.org/W2122772063","https://openalex.org/W2129962996","https://openalex.org/W2131459400","https://openalex.org/W2132808802","https://openalex.org/W2140007886","https://openalex.org/W2153185479","https://openalex.org/W2160946197","https://openalex.org/W2161611948","https://openalex.org/W2171066426","https://openalex.org/W2540025645"],"related_works":["https://openalex.org/W2611818882","https://openalex.org/W2126395326","https://openalex.org/W1595275176","https://openalex.org/W2408058673","https://openalex.org/W2140714142","https://openalex.org/W2148099609","https://openalex.org/W124901208","https://openalex.org/W2515308961","https://openalex.org/W2299668876","https://openalex.org/W2085860917"],"abstract_inverted_index":{"Nowadays,":[0],"many":[1],"real-time":[2,31,93,147],"applications":[3],"are":[4,113,124],"very":[5],"complex":[6,137],"and":[7,11,74,116,133,143,160,174,200,213],"as":[8,128,140],"the":[9,12,27,37,44,64,82,108,155,189,207],"complexity":[10],"requirements":[13],"of":[14,30,66,85,110,136,154,157,206],"those":[15],"systems":[16,32,94],"become":[17],"more":[18,20],"demanding,":[19],"hardware":[21,125],"processing":[22],"capacity":[23],"is":[24,48,152],"necessary.":[25],"Unfortunately,":[26],"correct":[28,39],"functioning":[29],"depends":[33],"not":[34],"only":[35],"on":[36,43,106,121],"logically":[38],"response":[40],"but":[41],"also":[42,114,195],"time":[45],"when":[46],"it":[47],"produced.":[49],"General-purpose":[50],"processor":[51],"design":[52],"fails":[53],"to":[54,58],"deliver":[55],"analyzability":[56],"due":[57],"their":[59],"nondeterministic":[60],"behavior":[61],"caused":[62],"by":[63,168],"use":[65,202],"cache":[67,173],"memories,":[68],"dynamic":[69],"branch":[70,130],"prediction,":[71,131],"speculative":[72],"execution,":[73],"out-of-order":[75],"pipelines.":[76],"In":[77],"this":[78,158],"article,":[79],"we":[80,117,161,201],"investigate":[81],"pipeline":[83,98,134],"performance":[84,214],"Very":[86],"Long":[87],"Instruction":[88],"Word":[89],"(VLIW)":[90],"architectures":[91],"for":[92,145,211],"with":[95],"an":[96],"in-order":[97],"considering":[99,188],"Worst-Case":[100],"Execution":[101],"Time":[102],"(WCET)":[103],"performance.":[104],"Techniques":[105],"obtaining":[107],"WCET":[109,209],"VLIW":[111,180,191],"machines":[112],"considered":[115],"make":[118],"a":[119,163,169,175,203],"quantification":[120],"how":[122],"important":[123],"techniques":[126],"such":[127,139],"static":[129],"predication,":[132],"speed":[135],"operations":[138],"memory":[141,150],"access":[142],"multiplication":[144],"high-performance":[146],"systems.":[148],"The":[149],"hierarchy":[151],"out":[153],"scope":[156],"article":[159],"used":[162],"classic":[164],"deterministic":[165],"structure":[166],"formed":[167],"direct":[170],"mapped":[171],"instruction":[172],"data":[176],"scratchpad":[177],"memory.":[178],"A":[179],"prototype":[181],"was":[182],"implemented":[183],"in":[184],"VHDL":[185],"from":[186],"scratch":[187],"HP":[190],"ST231":[192],"ISA.":[193],"We":[194],"show":[196],"some":[197],"compiler":[198],"insights":[199],"representative":[204],"subset":[205],"M\u00e4lardalen\u2019s":[208],"benchmarks":[210],"validation":[212],"quantification.":[215]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
