{"id":"https://openalex.org/W2322990374","doi":"https://doi.org/10.1145/2884045.2884050","title":"Designing high performance communication runtime for GPU managed memory","display_name":"Designing high performance communication runtime for GPU managed memory","publication_year":2016,"publication_date":"2016-03-04","ids":{"openalex":"https://openalex.org/W2322990374","doi":"https://doi.org/10.1145/2884045.2884050","mag":"2322990374"},"language":"en","primary_location":{"id":"doi:10.1145/2884045.2884050","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2884045.2884050","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=2884050&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"http://dl.acm.org/ft_gateway.cfm?id=2884050&type=pdf","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002481103","display_name":"Dip Sankar Banerjee","orcid":"https://orcid.org/0000-0002-0476-1224"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dip Sankar Banerjee","raw_affiliation_strings":["The Ohio State University, Columbus, OH"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Ohio State University, Columbus, OH","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048039700","display_name":"Khaled Hamidouche","orcid":"https://orcid.org/0000-0003-4836-5335"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Khaled Hamidouche","raw_affiliation_strings":["The Ohio State University, Columbus, OH"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Ohio State University, Columbus, OH","institution_ids":["https://openalex.org/I52357470"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024879682","display_name":"Dhabaleswar K. Panda","orcid":"https://orcid.org/0000-0002-0356-1781"},"institutions":[{"id":"https://openalex.org/I52357470","display_name":"The Ohio State University","ror":"https://ror.org/00rs6vg23","country_code":"US","type":"education","lineage":["https://openalex.org/I52357470"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dhabaleswar K. Panda","raw_affiliation_strings":["The Ohio State University, Columbus, OH"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Ohio State University, Columbus, OH","institution_ids":["https://openalex.org/I52357470"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I52357470"],"apc_list":null,"apc_paid":null,"fwci":0.8957,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.66686298,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"82","last_page":"91"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8190134763717651},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5925675630569458},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4493086338043213},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32068583369255066}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8190134763717651},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5925675630569458},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4493086338043213},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32068583369255066}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2884045.2884050","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2884045.2884050","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=2884050&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/2884045.2884050","is_oa":true,"landing_page_url":"https://doi.org/10.1145/2884045.2884050","pdf_url":"http://dl.acm.org/ft_gateway.cfm?id=2884050&type=pdf","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 9th Annual Workshop on General Purpose Processing using Graphics Processing Unit","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4791368036","display_name":"Collaborative Research: SI2-SSI: A Comprehensive Performance Tuning Framework for the MPI Stack","funder_award_id":"1148371","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5600734637","display_name":"SI2-SSI: Collaborative Research: A Software Infrastructure for MPI Performance Engineering: Integrating MVAPICH and TAU via the MPI Tools Interface","funder_award_id":"1450440","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6702996156","display_name":"SHF: Large: Collaborative Research: Unified Runtime for Supporting Hybrid Programming Models on Heterogeneous Architecture","funder_award_id":"1213084","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2322990374.pdf","grobid_xml":"https://content.openalex.org/works/W2322990374.grobid-xml"},"referenced_works_count":12,"referenced_works":["https://openalex.org/W1576599451","https://openalex.org/W1964981582","https://openalex.org/W2024565525","https://openalex.org/W2041679393","https://openalex.org/W2063057407","https://openalex.org/W2070940137","https://openalex.org/W2074833026","https://openalex.org/W2087417231","https://openalex.org/W2088123825","https://openalex.org/W2100377902","https://openalex.org/W2109977639","https://openalex.org/W6675221301"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2350741829","https://openalex.org/W2530322880"],"abstract_inverted_index":{"Graphics":[0],"Processing":[1],"Units":[2],"(GPUs)":[3],"have":[4,62],"gained":[5],"the":[6,28,34,46,70,81,86,109],"position":[7],"of":[8,58,69,127],"a":[9,41],"main":[10],"stream":[11],"accelerator":[12],"due":[13],"to":[14,80,112],"its":[15],"low":[16],"power":[17],"footprint":[18],"and":[19,36,44,89,104,116,125,138],"massive":[20],"parallelism.":[21],"CUDA":[22,99],"6.0":[23],"onward,":[24],"NVIDIA":[25],"has":[26],"introduced":[27],"Managed":[29],"Memory":[30],"capability":[31],"which":[32],"unifies":[33],"host":[35],"device":[37],"memory":[38,50,67,129],"allocations":[39],"into":[40],"single":[42],"allocation":[43],"removes":[45],"requirement":[47],"for":[48,135],"explicit":[49],"transfers":[51],"between":[52],"either":[53],"memories.":[54],"Several":[55],"applications":[56],"particularly":[57],"irregular":[59],"nature":[60],"can":[61,76],"immense":[63],"benefits":[64],"from":[65],"managed":[66,128],"because":[68],"high":[71,114],"productivity":[72,115],"in":[73,85],"programming":[74],"that":[75],"be":[77],"achieved":[78],"owing":[79],"minimal":[82],"effort":[83],"involved":[84],"data":[87],"management":[88],"movement.":[90],"The":[91],"MVAPICH2":[92],"library":[93],"utilizes":[94],"runtime":[95],"designs":[96],"such":[97],"as":[98],"Inter":[100],"Process":[101],"Communications":[102],"(IPC)":[103],"GPUDirect":[105],"RDMA":[106],"(GDR)":[107],"under":[108],"CUDA-Aware":[110],"concept,":[111],"offer":[113],"programmability":[117],"with":[118,130],"MPI":[119],"on":[120],"modern":[121],"clusters.":[122],"However,":[123],"integration":[124],"interaction":[126],"these":[131],"features":[132],"raises":[133],"challenges":[134],"efficient":[136],"small":[137],"large":[139],"message":[140],"communications.":[141]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-08-06T08:24:18.245995","created_date":"2025-10-10T00:00:00"}