{"id":"https://openalex.org/W2263852834","doi":"https://doi.org/10.1145/2872362.2872415","title":"Generating Configurable Hardware from Parallel Patterns","display_name":"Generating Configurable Hardware from Parallel Patterns","publication_year":2016,"publication_date":"2016-03-25","ids":{"openalex":"https://openalex.org/W2263852834","doi":"https://doi.org/10.1145/2872362.2872415","mag":"2263852834"},"language":"en","primary_location":{"id":"doi:10.1145/2872362.2872415","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2872362.2872415","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/221889","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111746097","display_name":"Raghu Prabhakar","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Raghu Prabhakar","raw_affiliation_strings":["Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018762260","display_name":"David Koeplinger","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Koeplinger","raw_affiliation_strings":["Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103616447","display_name":"Kevin J. Brown","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin J. Brown","raw_affiliation_strings":["Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047315031","display_name":"HyoukJoong Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I1291425158","display_name":"Google (United States)","ror":"https://ror.org/00njsd438","country_code":"US","type":"company","lineage":["https://openalex.org/I1291425158","https://openalex.org/I4210128969"]},{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"HyoukJoong Lee","raw_affiliation_strings":["Stanford University, Google, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Google, Stanford, CA, USA","institution_ids":["https://openalex.org/I1291425158","https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041869459","display_name":"Christopher De","orcid":"https://orcid.org/0000-0002-3610-2696"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Christopher De Sa","raw_affiliation_strings":["Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042148531","display_name":"Christos Kozyrakis","orcid":"https://orcid.org/0000-0002-3154-7530"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Christos Kozyrakis","raw_affiliation_strings":["Stanford University, EPFL, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, EPFL, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023857198","display_name":"Kunle Olukotun","orcid":"https://orcid.org/0000-0002-8779-0636"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kunle Olukotun","raw_affiliation_strings":["Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5111746097"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":10.9429,"has_fulltext":false,"cited_by_count":57,"citation_normalized_percentile":{"value":0.98888174,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"651","last_page":"665"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8521292209625244},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6277604699134827},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6128069162368774},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5878134965896606},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.5728961825370789},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5344632863998413},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5125734210014343},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4822033643722534},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4465199410915375},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.41793832182884216},{"id":"https://openalex.org/keywords/domain-specific-language","display_name":"Domain-specific language","score":0.4168543815612793},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4107692241668701},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3089371919631958},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.28265446424484253},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.12892097234725952},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09803038835525513}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8521292209625244},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6277604699134827},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6128069162368774},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5878134965896606},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.5728961825370789},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5344632863998413},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5125734210014343},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4822033643722534},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4465199410915375},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.41793832182884216},{"id":"https://openalex.org/C135257023","wikidata":"https://www.wikidata.org/wiki/Q691358","display_name":"Domain-specific language","level":2,"score":0.4168543815612793},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4107692241668701},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3089371919631958},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.28265446424484253},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.12892097234725952},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09803038835525513}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/2872362.2872415","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2872362.2872415","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:infoscience.epfl.ch:221889","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/221889","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:infoscience.tind.io:221889","is_oa":true,"landing_page_url":"https://infoscience.epfl.ch/handle/20.500.14299/129993","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conference proceedings"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:221889","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/221889","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5600000023841858}],"awards":[{"id":"https://openalex.org/G2101307914","display_name":"SHF: Large: Domain Specific Language Infrastructure for Biological Simulation Software","funder_award_id":"1111943","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G4341300196","display_name":null,"funder_award_id":"IIS-1247701, CCF-1111943, CCF-1337375, and SHF-1408911","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G4713059963","display_name":null,"funder_award_id":"FA8750","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"},{"id":"https://openalex.org/G4991748776","display_name":null,"funder_award_id":"SHF-1408911","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5531287684","display_name":null,"funder_award_id":"W911NF-07-2-0027","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G6412687866","display_name":"BIGDATA: Mid-Scale: DA: Collaborative Research: Genomes Galore - Core Techniques, Libraries, and Domain Specific Languages for High-Throughput DNA Sequencing","funder_award_id":"1247701","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G7565142652","display_name":"XPS:DSD:Synthesizing Domain Specific Systems","funder_award_id":"1337375","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G7707571486","display_name":null,"funder_award_id":"FA8750-12-2-0335","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"},{"id":"https://openalex.org/G7810261948","display_name":null,"funder_award_id":"IIS-1247701, CCF-1111943, CCF-1337375, SHF-1408911","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G8359814360","display_name":"SHF: Medium: Energy Efficient Memory Systems","funder_award_id":"1408911","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320309480","display_name":"Nvidia","ror":"https://ror.org/03jdj4y14"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":53,"referenced_works":["https://openalex.org/W9717478","https://openalex.org/W615149457","https://openalex.org/W975212003","https://openalex.org/W1598202309","https://openalex.org/W1691707530","https://openalex.org/W1749979338","https://openalex.org/W1978924650","https://openalex.org/W1983394510","https://openalex.org/W2008070495","https://openalex.org/W2025336994","https://openalex.org/W2026863902","https://openalex.org/W2034761517","https://openalex.org/W2035947216","https://openalex.org/W2036952936","https://openalex.org/W2049487370","https://openalex.org/W2054625910","https://openalex.org/W2055312318","https://openalex.org/W2060569848","https://openalex.org/W2061313045","https://openalex.org/W2071630526","https://openalex.org/W2099517310","https://openalex.org/W2102976251","https://openalex.org/W2103798154","https://openalex.org/W2106962797","https://openalex.org/W2112523971","https://openalex.org/W2120577120","https://openalex.org/W2122465391","https://openalex.org/W2122522028","https://openalex.org/W2131023841","https://openalex.org/W2132367502","https://openalex.org/W2138163628","https://openalex.org/W2141280299","https://openalex.org/W2143609451","https://openalex.org/W2151204271","https://openalex.org/W2152944133","https://openalex.org/W2157099283","https://openalex.org/W2166029537","https://openalex.org/W2167008350","https://openalex.org/W2189465200","https://openalex.org/W2191327475","https://openalex.org/W2215244614","https://openalex.org/W2240938131","https://openalex.org/W2272300165","https://openalex.org/W2289151794","https://openalex.org/W2474119684","https://openalex.org/W2479163984","https://openalex.org/W2505513334","https://openalex.org/W2734941459","https://openalex.org/W3009106325","https://openalex.org/W3083504653","https://openalex.org/W3183512268","https://openalex.org/W4231316372","https://openalex.org/W4253128333"],"related_works":["https://openalex.org/W2366672283","https://openalex.org/W2168113051","https://openalex.org/W4233828762","https://openalex.org/W2389932690","https://openalex.org/W2916312349","https://openalex.org/W2097236935","https://openalex.org/W2153401337","https://openalex.org/W4214657400","https://openalex.org/W2386257256","https://openalex.org/W1843355381"],"abstract_inverted_index":{"In":[0,150],"recent":[1],"years":[2],"the":[3,23,77,141,206],"computing":[4],"landscape":[5],"has":[6],"seen":[7],"an":[8],"increasing":[9],"shift":[10],"towards":[11],"specialized":[12],"accelerators.":[13],"Field":[14],"programmable":[15],"gate":[16],"arrays":[17],"(FPGAs)":[18],"are":[19,45,54,108,117],"particularly":[20],"promising":[21],"for":[22,38,61,121,158,181],"implementation":[24],"of":[25,42,76,80,140,174,203],"these":[26,192],"accelerators,":[27],"as":[28],"they":[29,125],"offer":[30],"significant":[31],"performance":[32],"and":[33,44,71,89,95,137,167,178,185],"energy":[34],"improvements":[35],"over":[36],"CPUs":[37],"a":[39,118,171,201],"wide":[40],"class":[41],"applications":[43],"far":[46,109],"more":[47],"flexible":[48],"than":[49],"fixed-function":[50],"ASICs.":[51],"However,":[52],"FPGAs":[53],"difficult":[55],"to":[56,129,162,198],"program.":[57],"Traditional":[58],"programming":[59],"models":[60],"reconfigurable":[62],"logic":[63],"use":[64],"low-level":[65,90],"hardware":[66,122,135,146],"description":[67],"languages":[68,83,92,113],"like":[69,93],"Verilog":[70],"VHDL,":[72],"which":[73],"have":[74],"none":[75],"productivity":[78],"features":[79],"modern":[81],"software":[82,91],"but":[84],"produce":[85,105],"very":[86],"efficient":[87,164],"designs,":[88],"C":[94],"OpenCL":[96],"coupled":[97],"with":[98,114,131],"high-level":[99,127],"synthesis":[100],"(HLS)":[101],"tools":[102],"that":[103,107,191],"typically":[104],"designs":[106],"less":[110],"efficient.":[111],"Functional":[112],"parallel":[115,160,176],"patterns":[116,161,184],"better":[119],"fit":[120],"generation":[123],"because":[124],"provide":[126,179],"abstractions":[128],"programmers":[130],"little":[132],"experience":[133],"in":[134,195],"design":[136],"avoid":[138],"many":[139],"problems":[142],"faced":[143],"when":[144],"generating":[145,186],"from":[147,205],"imperative":[148],"languages.":[149],"this":[151],"paper,":[152],"we":[153],"identify":[154],"two":[155],"important":[156],"optimizations":[157,193],"using":[159],"generate":[163],"hardware:":[165],"tiling":[166,183],"metapipelining.":[168],"We":[169,188],"present":[170],"general":[172],"representation":[173],"tiled":[175],"patterns,":[177],"rules":[180],"automatically":[182],"metapipelines.":[187],"demonstrate":[189],"experimentally":[190],"result":[194],"speedups":[196],"up":[197],"39.4\u00d7":[199],"on":[200],"set":[202],"benchmarks":[204],"data":[207],"analytics":[208],"domain.":[209]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":9},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":11},{"year":2018,"cited_by_count":10},{"year":2017,"cited_by_count":9},{"year":2016,"cited_by_count":4}],"updated_date":"2026-03-18T14:38:29.013473","created_date":"2025-10-10T00:00:00"}