{"id":"https://openalex.org/W2328615082","doi":"https://doi.org/10.1145/2872334.2886419","title":"Routability-Driven FPGA Placement Contest","display_name":"Routability-Driven FPGA Placement Contest","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2328615082","doi":"https://doi.org/10.1145/2872334.2886419","mag":"2328615082"},"language":"en","primary_location":{"id":"doi:10.1145/2872334.2886419","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2872334.2886419","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 on International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066133332","display_name":"Stephen Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Stephen Yang","raw_affiliation_strings":["Xilinx Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044867230","display_name":"Aman Gayasen","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aman Gayasen","raw_affiliation_strings":["Xilinx Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022588908","display_name":"Chandra Mulpuri","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chandra Mulpuri","raw_affiliation_strings":["Xilinx Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017844381","display_name":"G. Sudhaamsh Mohan Reddy","orcid":"https://orcid.org/0000-0002-3828-5852"},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sainath Reddy","raw_affiliation_strings":["Xilinx Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110492408","display_name":"Rajat Aggarwal","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajat Aggarwal","raw_affiliation_strings":["Xilinx Inc., San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Xilinx Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I32923980"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5066133332"],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":3.6753,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.9333457,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"139","last_page":"143"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.9435909986495972},{"id":"https://openalex.org/keywords/contest","display_name":"CONTEST","score":0.8713852167129517},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.709428608417511},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.6339285373687744},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.599544882774353},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.5832629203796387},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5081682205200195},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4265548586845398}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9435909986495972},{"id":"https://openalex.org/C2777582232","wikidata":"https://www.wikidata.org/wiki/Q5013414","display_name":"CONTEST","level":2,"score":0.8713852167129517},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.709428608417511},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.6339285373687744},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.599544882774353},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5832629203796387},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5081682205200195},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4265548586845398},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2872334.2886419","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2872334.2886419","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 on International Symposium on Physical Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2037266728"],"related_works":["https://openalex.org/W2998132311","https://openalex.org/W2207067480","https://openalex.org/W4383823603","https://openalex.org/W1692883217","https://openalex.org/W2406926880","https://openalex.org/W2332075903","https://openalex.org/W1579891439","https://openalex.org/W2291257309","https://openalex.org/W2082487009","https://openalex.org/W272033699"],"abstract_inverted_index":{"The":[0],"advances":[1],"of":[2,8,48,56],"FPGA":[3,9,15,21,39,44,52],"technology":[4],"and":[5],"increasing":[6],"size":[7],"designs":[10,50],"pose":[11],"great":[12],"challenges":[13],"on":[14,20,38],"design":[16,23],"tools.":[17,30,41],"Deep":[18],"research":[19],"physical":[22],"problems":[24],"is":[25,33,54],"paramount":[26],"to":[27,60],"improve":[28],"industrial":[29],"This":[31],"contest":[32,37],"the":[34,57,62],"first":[35],"ISPD":[36],"CAD":[40],"Routability":[42],"driven":[43],"placement,":[45],"in":[46],"context":[47],"large":[49],"modern":[51],"architecture,":[53],"one":[55],"best":[58],"topics":[59],"start":[61],"effort.":[63]},"counts_by_year":[{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":7},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
