{"id":"https://openalex.org/W2327836262","doi":"https://doi.org/10.1145/2857058.2857063","title":"Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems","display_name":"Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems","publication_year":2016,"publication_date":"2016-01-15","ids":{"openalex":"https://openalex.org/W2327836262","doi":"https://doi.org/10.1145/2857058.2857063","mag":"2327836262"},"language":"en","primary_location":{"id":"doi:10.1145/2857058.2857063","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2857058.2857063","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077753806","display_name":"Gabriele Miorandi","orcid":null},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Gabriele Miorandi","raw_affiliation_strings":["ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy"],"affiliations":[{"raw_affiliation_string":"ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076301734","display_name":"Mahdi Tala","orcid":"https://orcid.org/0000-0002-9977-3358"},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mahdi Tala","raw_affiliation_strings":["ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy"],"affiliations":[{"raw_affiliation_string":"ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068956689","display_name":"Marco Balboni","orcid":null},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Balboni","raw_affiliation_strings":["ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy"],"affiliations":[{"raw_affiliation_string":"ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044730358","display_name":"Luca Ramini","orcid":null},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Ramini","raw_affiliation_strings":["ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy"],"affiliations":[{"raw_affiliation_string":"ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011268330","display_name":"Davide Bertozzi","orcid":"https://orcid.org/0000-0001-7462-4551"},"institutions":[{"id":"https://openalex.org/I201324441","display_name":"University of Ferrara","ror":"https://ror.org/041zkgm14","country_code":"IT","type":"education","lineage":["https://openalex.org/I201324441"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Davide Bertozzi","raw_affiliation_strings":["ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy"],"affiliations":[{"raw_affiliation_string":"ENDIF, Engineering Department in Ferrara, University of Ferrara, Italy","institution_ids":["https://openalex.org/I201324441"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5077753806"],"corresponding_institution_ids":["https://openalex.org/I201324441"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.02069724,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9642999768257141,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9631999731063843,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6665558815002441},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6024088263511658},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5248858332633972},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5246092081069946},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46053197979927063},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4425096809864044},{"id":"https://openalex.org/keywords/handshaking","display_name":"Handshaking","score":0.4179408550262451},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.414018452167511},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3627970218658447},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22889798879623413},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.11499488353729248}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6665558815002441},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6024088263511658},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5248858332633972},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5246092081069946},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46053197979927063},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4425096809864044},{"id":"https://openalex.org/C58861099","wikidata":"https://www.wikidata.org/wiki/Q548838","display_name":"Handshaking","level":2,"score":0.4179408550262451},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.414018452167511},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3627970218658447},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22889798879623413},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.11499488353729248},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2857058.2857063","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2857058.2857063","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unife.it:11392/2365530","is_oa":false,"landing_page_url":"http://hdl.handle.net/11392/2365530","pdf_url":null,"source":{"id":"https://openalex.org/S4306400369","display_name":"Institutional Research Information System University of Ferrara (University of Ferrara)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I201324441","host_organization_name":"University of Ferrara","host_organization_lineage":["https://openalex.org/I201324441"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4399999976158142,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320324162","display_name":"Universit\u00e0 degli Studi di Ferrara","ror":"https://ror.org/041zkgm14"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W114128691","https://openalex.org/W124329337","https://openalex.org/W186740131","https://openalex.org/W1538452085","https://openalex.org/W1600358781","https://openalex.org/W1609287256","https://openalex.org/W1644445135","https://openalex.org/W1969405477","https://openalex.org/W1971571455","https://openalex.org/W1974927420","https://openalex.org/W2035854748","https://openalex.org/W2046328677","https://openalex.org/W2054272140","https://openalex.org/W2085836326","https://openalex.org/W2096696871","https://openalex.org/W2101193087","https://openalex.org/W2105484323","https://openalex.org/W2134014163","https://openalex.org/W2135933214","https://openalex.org/W2147436399","https://openalex.org/W2178247634","https://openalex.org/W2745045259","https://openalex.org/W3150685302"],"related_works":["https://openalex.org/W3023876411","https://openalex.org/W123152114","https://openalex.org/W3142211975","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2130914040","https://openalex.org/W2119122672","https://openalex.org/W4292904049","https://openalex.org/W2136848245","https://openalex.org/W1978899622"],"abstract_inverted_index":{"Networks-on-chip":[0],"(NoCs)":[1],"are":[2,50],"today":[3],"at":[4],"the":[5,14,32,65,74,78,81,104,132,144,150,158],"core":[6],"of":[7,103,127,134,154,160],"multi-":[8],"and":[9,94,119],"many-core":[10],"systems,":[11],"acting":[12],"as":[13,44,46,147,149],"system-level":[15],"integration":[16],"framework.":[17],"In":[18,40],"order":[19],"to":[20,23,30,72],"support":[21,131],"scaling":[22],"future":[24,138],"device":[25],"generations,":[26],"NoCs":[27],"will":[28],"struggle":[29],"deliver":[31],"required":[33],"communication":[34],"performance":[35],"within":[36],"tight":[37],"power":[38,71,101,142],"budgets.":[39],"this":[41,128],"respect,":[42],"evolutionary":[43],"well":[45,148],"revolutionary":[47],"interconnect":[48,135,162],"technologies":[49,106],"currently":[51],"being":[52],"considered.":[53],"On":[54,77],"one":[55],"hand,":[56,80],"clockless":[57],"handshaking":[58],"materializes":[59],"GALS":[60],"systems":[61,140],"that":[62],"completely":[63],"remove":[64],"system":[66],"clock":[67],"while":[68],"reducing":[69],"idle":[70],"only":[73],"leakage":[75],"power.":[76],"other":[79,118],"technology":[82],"platform":[83],"could":[84],"be":[85],"changed,":[86],"by":[87,113],"replacing":[88],"electrical":[89],"wires":[90],"with":[91,116,120],"optical":[92],"links":[93],"networks.":[95],"This":[96],"paper":[97,129],"provides":[98],"a":[99,110,121],"comprehensive":[100],"analysis":[102],"two":[105],"under":[107],"test":[108],"on":[109],"path-by-path":[111],"basis,":[112],"comparing":[114],"them":[115],"each":[117],"baseline":[122],"synchronous":[123],"NoC.":[124],"The":[125],"outcome":[126],"can":[130],"selection":[133,152],"solutions":[136],"for":[137],"manycore":[139],"where":[141],"is":[143],"primary":[145],"concern,":[146],"runtime":[151],"policy":[153],"routing":[155],"paths":[156],"in":[157],"context":[159],"hybrid":[161],"fabrics.":[163]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-02-09T09:26:11.010843","created_date":"2025-10-10T00:00:00"}
