{"id":"https://openalex.org/W2293057678","doi":"https://doi.org/10.1145/2847263.2847294","title":"A Scalable Heterogeneous Dataflow Architecture For Big Data Analytics Using FPGAs (Abstract Only)","display_name":"A Scalable Heterogeneous Dataflow Architecture For Big Data Analytics Using FPGAs (Abstract Only)","publication_year":2016,"publication_date":"2016-02-04","ids":{"openalex":"https://openalex.org/W2293057678","doi":"https://doi.org/10.1145/2847263.2847294","mag":"2293057678"},"language":"en","primary_location":{"id":"doi:10.1145/2847263.2847294","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263.2847294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069714606","display_name":"Ehsan Ghasemi","orcid":"https://orcid.org/0000-0002-6095-6667"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Ehsan Ghasemi","raw_affiliation_strings":["University of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035437657","display_name":"Paul Chow","orcid":"https://orcid.org/0000-0002-0523-7117"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Paul Chow","raw_affiliation_strings":["University of Toronto, University of Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"University of Toronto, University of Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5069714606"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":0.6307,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.64867406,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"274","last_page":"274"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8569626212120056},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.8307622075080872},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.8248169422149658},{"id":"https://openalex.org/keywords/spark","display_name":"SPARK (programming language)","score":0.7196788191795349},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6471323370933533},{"id":"https://openalex.org/keywords/analytics","display_name":"Analytics","score":0.6291564702987671},{"id":"https://openalex.org/keywords/big-data","display_name":"Big data","score":0.6205436587333679},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5806105136871338},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.5152435898780823},{"id":"https://openalex.org/keywords/data-analysis","display_name":"Data analysis","score":0.43594256043434143},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4252047538757324},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4161722660064697},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39462533593177795},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37821418046951294},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2635355591773987},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.25265079736709595},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07686150074005127}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8569626212120056},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.8307622075080872},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.8248169422149658},{"id":"https://openalex.org/C2781215313","wikidata":"https://www.wikidata.org/wiki/Q3493345","display_name":"SPARK (programming language)","level":2,"score":0.7196788191795349},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6471323370933533},{"id":"https://openalex.org/C79158427","wikidata":"https://www.wikidata.org/wiki/Q485396","display_name":"Analytics","level":2,"score":0.6291564702987671},{"id":"https://openalex.org/C75684735","wikidata":"https://www.wikidata.org/wiki/Q858810","display_name":"Big data","level":2,"score":0.6205436587333679},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5806105136871338},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.5152435898780823},{"id":"https://openalex.org/C175801342","wikidata":"https://www.wikidata.org/wiki/Q1988917","display_name":"Data analysis","level":2,"score":0.43594256043434143},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4252047538757324},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4161722660064697},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39462533593177795},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37821418046951294},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2635355591773987},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.25265079736709595},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07686150074005127},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2847263.2847294","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263.2847294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7400000095367432}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W263458817","https://openalex.org/W1551492423","https://openalex.org/W1585704789","https://openalex.org/W1982565841","https://openalex.org/W2001159324","https://openalex.org/W2008241424","https://openalex.org/W2041908012","https://openalex.org/W2122465391","https://openalex.org/W2122522028","https://openalex.org/W2131975293","https://openalex.org/W2133797469","https://openalex.org/W2139072600"],"related_works":["https://openalex.org/W2564598376","https://openalex.org/W1484403103","https://openalex.org/W2584408851","https://openalex.org/W2115158825","https://openalex.org/W2101960124","https://openalex.org/W4377693460","https://openalex.org/W2033683327","https://openalex.org/W2783505431","https://openalex.org/W2521947294","https://openalex.org/W4236419692"],"abstract_inverted_index":{"Due":[0],"to":[1,55,91,123],"rapidly":[2],"expanding":[3],"data":[4,19,38,61],"size,":[5],"there":[6],"is":[7],"increasing":[8],"need":[9],"for":[10,16,59],"scalable,":[11,95],"high-performance,":[12],"and":[13,51,96],"low-energy":[14],"frameworks":[15],"large-":[17],"scale":[18],"computation.":[20],"We":[21,63,112],"build":[22],"a":[23,31,36,75,80,93,115],"dataflow":[24],"architecture":[25],"that":[26],"harnesses":[27],"FPGA":[28],"resources":[29],"within":[30,67],"distributed":[32,48,125],"analytics":[33,39,71],"platform":[34],"creating":[35],"heterogeneous":[37,77],"framework.":[40],"This":[41],"approach":[42],"leverages":[43],"the":[44,68,88,101,129,132],"scalability":[45,130],"of":[46,104,131],"existing":[47],"processing":[49],"environments":[50],"provides":[52],"easy":[53],"access":[54],"custom":[56,106],"hardware":[57],"accelerators":[58],"large-scale":[60],"analysis.":[62],"prototype":[64],"our":[65,124],"framework":[66,126],"Apache":[69],"Spark":[70,133],"tool":[72],"running":[73],"on":[74],"CPU-FPGA":[76],"cluster.":[78],"As":[79],"specific":[81],"application":[82,118],"case":[83],"study,":[84],"we":[85],"have":[86],"chosen":[87],"MapReduce":[89,110,117],"paradigm":[90],"implement":[92],"multi-purpose,":[94],"customizable":[97],"RTL":[98],"accelerator":[99],"inside":[100],"FPGA,":[102],"capable":[103],"incorporating":[105],"High-Level":[107],"Synthesis":[108],"(HLS)":[109],"kernels.":[111],"demonstrate":[113],"how":[114],"typical":[116],"can":[119],"be":[120],"simply":[121],"adapted":[122],"while":[127],"retaining":[128],"platform.":[134]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}