{"id":"https://openalex.org/W2268762552","doi":"https://doi.org/10.1145/2847263.2847270","title":"PRFloor","display_name":"PRFloor","publication_year":2016,"publication_date":"2016-02-04","ids":{"openalex":"https://openalex.org/W2268762552","doi":"https://doi.org/10.1145/2847263.2847270","mag":"2268762552"},"language":"en","primary_location":{"id":"doi:10.1145/2847263.2847270","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263.2847270","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083517801","display_name":"Tuan D. A. Nguyen","orcid":"https://orcid.org/0000-0002-5108-4684"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Tuan D.A. Nguyen","raw_affiliation_strings":["National University of Singapore, Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"National University of Singapore, Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100755285","display_name":"Akash Kumar","orcid":"https://orcid.org/0000-0001-7125-1737"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Akash Kumar","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5083517801"],"corresponding_institution_ids":["https://openalex.org/I165932596"],"apc_list":null,"apc_paid":null,"fwci":2.0214,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.87269729,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"149","last_page":"158"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.8040934801101685},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7624808549880981},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7363913059234619},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6503909230232239},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6318609714508057},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5508407354354858},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.48623767495155334},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.4444505572319031},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.43562859296798706},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3899089992046356},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38858675956726074},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33632171154022217},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.30098530650138855},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17066940665245056},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11017102003097534}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.8040934801101685},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7624808549880981},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7363913059234619},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6503909230232239},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6318609714508057},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5508407354354858},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.48623767495155334},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.4444505572319031},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.43562859296798706},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3899089992046356},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38858675956726074},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33632171154022217},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.30098530650138855},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17066940665245056},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11017102003097534},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2847263.2847270","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263.2847270","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5199999809265137,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W92551552","https://openalex.org/W165160209","https://openalex.org/W586995468","https://openalex.org/W1966195532","https://openalex.org/W1983517606","https://openalex.org/W1993038918","https://openalex.org/W2005306165","https://openalex.org/W2005730042","https://openalex.org/W2022830573","https://openalex.org/W2034729118","https://openalex.org/W2049213525","https://openalex.org/W2111034061","https://openalex.org/W2111713218","https://openalex.org/W2113341980","https://openalex.org/W2120785033","https://openalex.org/W2124455101","https://openalex.org/W2131455863","https://openalex.org/W2154363663","https://openalex.org/W2154940055","https://openalex.org/W2165757198","https://openalex.org/W2186284576","https://openalex.org/W2535351973","https://openalex.org/W3104001151","https://openalex.org/W3132670815","https://openalex.org/W4243958534","https://openalex.org/W6632525437"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998"],"abstract_inverted_index":{"Partial":[0],"reconfiguration":[1],"(PR)":[2],"is":[3,93,188],"gaining":[4],"more":[5],"attention":[6],"from":[7],"the":[8,21,26,31,37,42,53,56,66,86,98,124,132,153,171,181,193],"research":[9,71],"community":[10],"because":[11],"of":[12,20,52,85,90,170],"its":[13],"flexibility":[14],"in":[15,34,123,152],"dynamically":[16],"changing":[17],"some":[18],"parts":[19],"system":[22,57,159],"at":[23],"runtime.":[24],"However,":[25,83],"current":[27],"PR":[28,43,81,113,158,183,197],"tools":[29],"need":[30],"designer's":[32],"involvement":[33],"manually":[35],"specifying":[36],"shapes":[38],"and":[39,100,168],"locations":[40],"for":[41,80,180],"regions":[44],"(PRRs).":[45],"It":[46,117],"requires":[47],"not":[48],"only":[49,96],"deep":[50],"knowledge":[51],"FPGA":[54,172],"device,":[55],"architecture,":[58],"but":[59],"also":[60],"many":[61,70],"trial-and-error":[62],"attempts":[63],"to":[64,76,163],"find":[65],"best-possible":[67],"floorplan.":[68],"Therefore,":[69],"works":[72,92],"have":[73],"been":[74],"conducted":[75],"propose":[77,110],"automatic":[78],"floorplanners":[79],"systems.":[82],"one":[84],"most":[87],"significant":[88],"limitations":[89],"those":[91],"that":[94],"they":[95],"consider":[97],"PRRs":[99,167],"ignore":[101],"all":[102,121],"other":[103],"static":[104],"modules.":[105],"In":[106],"this":[107],"paper,":[108],"we":[109],"a":[111,138],"novel":[112],"floorplanner":[114],"called":[115],"PRFloor.":[116],"takes":[118],"into":[119],"account":[120],"components":[122],"system.":[125],"The":[126,147,174],"main":[127],"ideas":[128],"behind":[129],"PRFloor":[130,148,187],"are":[131],"unique":[133],"recursive":[134],"pseudo-bipartitioning":[135],"heuristic":[136],"using":[137,186],"new,":[139],"simple,":[140],"yet":[141],"effective":[142],"Nonlinear":[143],"Integer":[144],"Programming-based":[145],"bipartitioner.":[146],"performs":[149],"very":[150],"well":[151],"experiments":[154],"with":[155,161],"various":[156],"synthetic":[157],"setups":[160],"up":[162],"130":[164],"modules,":[165],"24":[166],"85%":[169],"resource.":[173],"average":[175],"maximum":[176],"clock":[177],"frequency":[178],"obtained":[179],"actual":[182],"systems":[184,195],"implemented":[185],"even":[189],"3%":[190],"higher":[191],"than":[192],"similar":[194],"without":[196],"capability.":[198]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}
