{"id":"https://openalex.org/W4298020897","doi":"https://doi.org/10.1145/2847263","title":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","display_name":"Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","publication_year":2016,"publication_date":"2016-02-04","ids":{"openalex":"https://openalex.org/W4298020897","doi":"https://doi.org/10.1145/2847263"},"language":"en","primary_location":{"id":"doi:10.1145/2847263","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},"type":"paratext","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":true,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.982699990272522,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.982699990272522,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.980400025844574,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9783999919891357,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8014125823974609},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6481358408927917},{"id":"https://openalex.org/keywords/presentation","display_name":"Presentation (obstetrics)","score":0.48451942205429077},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.47123822569847107},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46188682317733765},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4470934271812439},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32737278938293457}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8014125823974609},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6481358408927917},{"id":"https://openalex.org/C2777601897","wikidata":"https://www.wikidata.org/wiki/Q3409113","display_name":"Presentation (obstetrics)","level":2,"score":0.48451942205429077},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.47123822569847107},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46188682317733765},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4470934271812439},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32737278938293457},{"id":"https://openalex.org/C126838900","wikidata":"https://www.wikidata.org/wiki/Q77604","display_name":"Radiology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2847263","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2847263","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.5699999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4387426029","https://openalex.org/W4254162896","https://openalex.org/W2110265185","https://openalex.org/W3146360095","https://openalex.org/W2184011203","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2038503502","https://openalex.org/W2154356865"],"abstract_inverted_index":{"It":[0],"is":[1,20,92],"our":[2,219],"great":[3],"pleasure":[4],"to":[5,8,21,105,119,264,278],"welcome":[6],"you":[7,166],"the":[9,24,37,90,103,111,184,201,208,233,242],"2016":[10],"ACM":[11],"International":[12],"Symposium":[13,91,238],"on":[14,33,245],"FPGAs":[15,211,249],"(FPGA":[16],"2016).":[17],"Our":[18,271],"mission":[19],"serve":[22],"as":[23,181],"premier":[25],"forum":[26],"for":[27,56,74,95,218,248,280],"presentation":[28],"of":[29,36,41,52,68,114,135,164,187,210,228,255],"exciting":[30],"new":[31],"research":[32,149,155],"all":[34],"aspects":[35,227],"design":[38,51,54,72,86,266],"and":[39,49,61,66,71,77,81,85,99,107,159,268],"use":[40],"Field":[42],"Programmable":[43],"Gate":[44],"Arrays.":[45],"This":[46,126,194],"includes:":[47],"Architecture":[48],"circuit":[50],"FPGAsComputer-aided":[53],"algorithms":[55],"synthesis,":[57],"technology":[58],"mapping,":[59],"logic":[60],"timing":[62],"optimization,":[63],"clustering,":[64],"placement,":[65],"routing":[67],"FPGAsHigh-level":[69],"abstractions":[70],"tools":[73],"FPGA":[75,83,97,234,281],"usersFPGA-based":[76],"FPGA-like":[78],"computing":[79],"engines":[80],"acceleratorsInnovative":[82],"applications":[84],"studies.":[87],"In":[88,172],"addition,":[89,173],"an":[93,133],"opportunity":[94],"leading":[96],"researchers":[98],"practitioners":[100],"from":[101,140],"around":[102],"world":[104,124],"mingle":[106],"share":[108],"ideas":[109],"in":[110,169,191,232],"relaxed":[112],"atmosphere":[113],"Monterey,":[115],"California":[116],"--":[117,132,139],"convenient":[118],"Silicon":[120],"Valley,":[121],"yet":[122],"a":[123,260],"apart.":[125],"year":[127],"we":[128],"received":[129],"111":[130],"submissions":[131,177],"increase":[134],"10":[136,153],"per":[137],"cent":[138],"17":[141],"countries.":[142],"The":[143,237],"Program":[144],"Committee":[145],"accepted":[146],"20":[147],"full":[148],"papers":[150,156],"(ten":[151],"pages),":[152,158],"short":[154],"(six":[157],"one":[160],"tutorial":[161],"paper,":[162],"each":[163],"which":[165],"will":[167,178,199,275],"find":[168],"these":[170,188,192],"proceedings.":[171,193],"30":[174],"other":[175],"select":[176],"be":[179,212,276],"presented":[180],"posters":[182],"at":[183],"Symposium;":[185],"abstracts":[186],"also":[189],"appear":[190],"year's":[195],"evening":[196],"panel":[197],"discussion":[198],"address":[200],"topic":[202],"\"Intel":[203],"Acquires":[204],"Altera:":[205],"How":[206],"Will":[207],"World":[209],"Affected?\"":[213],"Bring":[214],"your":[215],"tough":[216],"questions":[217],"expert":[220],"panelists,":[221],"concerning":[222],"either":[223],"technical":[224],"or":[225],"business":[226],"this":[229],"significant":[230],"change":[231],"industry":[235],"landscape.":[236],"kicks":[239],"off":[240],"with":[241],"co-located":[243],"Workshop":[244],"Overlay":[246,251],"Architectures":[247],"(OLAF).":[250],"architectures":[252],"(e.g.":[253],"arrays":[254],"special-purpose":[256],"soft":[257],"processors)":[258],"are":[259],"potentially":[261],"powerful":[262],"way":[263],"improve":[265],"productivity":[267],"virtualize":[269],"FPGAs.":[270],"Designers'":[272],"Day":[273],"sessions":[274],"devoted":[277],"tutorials":[279],"users.":[282]},"counts_by_year":[{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
