{"id":"https://openalex.org/W2002896418","doi":"https://doi.org/10.1145/2818950.2818973","title":"Rethinking Design Metrics for Datacenter DRAM","display_name":"Rethinking Design Metrics for Datacenter DRAM","publication_year":2015,"publication_date":"2015-10-05","ids":{"openalex":"https://openalex.org/W2002896418","doi":"https://doi.org/10.1145/2818950.2818973","mag":"2002896418"},"language":"en","primary_location":{"id":"doi:10.1145/2818950.2818973","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2818950.2818973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 International Symposium on Memory Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012432339","display_name":"Manu Awasthi","orcid":"https://orcid.org/0000-0002-5616-9679"},"institutions":[{"id":"https://openalex.org/I4210101778","display_name":"Samsung (United States)","ror":"https://ror.org/01bfbvm65","country_code":"US","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210101778"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Manu Awasthi","raw_affiliation_strings":["Samsung Semiconductor, Inc., 601 McCarthy Blvd., Milpitas, CA"],"affiliations":[{"raw_affiliation_string":"Samsung Semiconductor, Inc., 601 McCarthy Blvd., Milpitas, CA","institution_ids":["https://openalex.org/I4210101778"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5012432339"],"corresponding_institution_ids":["https://openalex.org/I4210101778"],"apc_list":null,"apc_paid":null,"fwci":4.117,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.9417436,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"162","last_page":"163"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9291672706604004},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.782871663570404},{"id":"https://openalex.org/keywords/server","display_name":"Server","score":0.6974376440048218},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5889976024627686},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5789039134979248},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.5376492738723755},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5041686296463013},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.44271954894065857},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.41153717041015625},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3393203318119049},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2728678584098816},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2540890574455261},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.20889493823051453},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.12522068619728088},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1121777594089508}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9291672706604004},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.782871663570404},{"id":"https://openalex.org/C93996380","wikidata":"https://www.wikidata.org/wiki/Q44127","display_name":"Server","level":2,"score":0.6974376440048218},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5889976024627686},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5789039134979248},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.5376492738723755},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5041686296463013},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.44271954894065857},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.41153717041015625},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3393203318119049},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2728678584098816},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2540890574455261},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.20889493823051453},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.12522068619728088},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1121777594089508}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2818950.2818973","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2818950.2818973","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2015 International Symposium on Memory Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.697.1904","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.697.1904","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.utah.edu/%7Emanua/pubs/memsys15.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6100000143051147,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2036895660","https://openalex.org/W2067005380","https://openalex.org/W2103060820","https://openalex.org/W2131164945","https://openalex.org/W2143735664","https://openalex.org/W2158620667"],"related_works":["https://openalex.org/W2516517078","https://openalex.org/W2150909864","https://openalex.org/W4382618825","https://openalex.org/W2161286015","https://openalex.org/W4386903460","https://openalex.org/W2900372418","https://openalex.org/W2924367614","https://openalex.org/W4211178602","https://openalex.org/W1992487929","https://openalex.org/W2094308961"],"abstract_inverted_index":{"Over":[0],"the":[1,3,25,65,77,90,126,130],"years,":[2],"evolution":[4],"of":[5,39,58,76],"DRAM":[6,114],"has":[7,16],"provided":[8],"a":[9,31,55,73],"little":[10],"improvement":[11],"in":[12,30,64],"access":[13,53],"latencies,":[14],"but":[15],"been":[17],"optimized":[18],"to":[19,54,70,100,106,121,124,129],"deliver":[20],"greater":[21],"peak":[22,117],"bandwidths":[23],"from":[24,89,109],"devices.":[26],"The":[27],"combined":[28],"bandwidth":[29,118,142],"contemporary":[32],"multi-socket":[33],"server":[34,47,132],"system":[35],"runs":[36],"into":[37],"hundreds":[38],"GB/s.":[40],"However":[41],"datacenter":[42,96,131],"scale":[43],"applications":[44],"running":[45,93],"on":[46],"platforms":[48],"care":[49],"largely":[50],"about":[51],"having":[52],"large":[56],"pool":[57],"low-latency":[59],"main":[60,103],"memory":[61,79,94,104,139],"(DRAM),":[62],"and":[63],"best":[66],"case,":[67],"are":[68],"unable":[69],"utilize":[71],"even":[72],"small":[74],"fraction":[75],"total":[78],"bandwidth.":[80],"In":[81],"this":[82],"extended":[83],"abstract,":[84],"we":[85],"use":[86],"measured":[87],"data":[88],"state-of-the-art":[91],"servers":[92],"intensive":[95],"workloads":[97],"like":[98,116],"Memcached":[99],"argue":[101],"for":[102,113,134],"design":[105,115],"steer":[107],"away":[108],"optimizing":[110],"traditional":[111],"metrics":[112],"so":[119],"as":[120],"be":[122],"able":[123],"cater":[125],"growing":[127],"needs":[128],"industry":[133],"high":[135],"density,":[136],"low":[137],"latency":[138],"with":[140],"moderate":[141],"requirements.":[143]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":5}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
