{"id":"https://openalex.org/W2105743840","doi":"https://doi.org/10.1145/2801948.2801994","title":"Comparison of OpenCL based design for a medical device on heterogeneous architectures with CPU, GPU and FPGA","display_name":"Comparison of OpenCL based design for a medical device on heterogeneous architectures with CPU, GPU and FPGA","publication_year":2015,"publication_date":"2015-09-22","ids":{"openalex":"https://openalex.org/W2105743840","doi":"https://doi.org/10.1145/2801948.2801994","mag":"2105743840"},"language":"en","primary_location":{"id":"doi:10.1145/2801948.2801994","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2801948.2801994","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th Panhellenic Conference on Informatics","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006636600","display_name":"Efthymia Kazakou","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Efthymia Kazakou","raw_affiliation_strings":["National Technical University of Athens, GR, Zografou, Athens, Greece","National Technical University of Athens, GR, Zografou, Athens, Greece#TAB#"],"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, GR, Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, GR, Zografou, Athens, Greece#TAB#","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089110665","display_name":"George Economakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Economakos","raw_affiliation_strings":["National Technical University of Athens, GR, Zografou, Athens, Greece","National Technical University of Athens, GR, Zografou, Athens, Greece#TAB#"],"affiliations":[{"raw_affiliation_string":"National Technical University of Athens, GR, Zografou, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"National Technical University of Athens, GR, Zografou, Athens, Greece#TAB#","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5006636600"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.08317563,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"77","last_page":"82"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9854000210762024,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8615357875823975},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7484003901481628},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.694205105304718},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6211585402488708},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.46363943815231323},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4488808512687683},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43584877252578735},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.43444210290908813},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3314201831817627},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09221267700195312}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8615357875823975},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7484003901481628},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.694205105304718},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6211585402488708},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.46363943815231323},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4488808512687683},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43584877252578735},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.43444210290908813},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3314201831817627},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09221267700195312}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2801948.2801994","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2801948.2801994","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 19th Panhellenic Conference on Informatics","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.550000011920929,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2021295531","https://openalex.org/W2043957526","https://openalex.org/W2053839625","https://openalex.org/W2078555859","https://openalex.org/W2083986012","https://openalex.org/W2090493021","https://openalex.org/W2094998159","https://openalex.org/W2126068349","https://openalex.org/W2131355383","https://openalex.org/W2140926581","https://openalex.org/W2170143817","https://openalex.org/W2171429297","https://openalex.org/W2535599028","https://openalex.org/W4234381228","https://openalex.org/W4301953474"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W4385856009","https://openalex.org/W2319262638","https://openalex.org/W2783386063","https://openalex.org/W2904152126","https://openalex.org/W46230514"],"abstract_inverted_index":{"Digital":[0],"design":[1,29,47,128],"is":[2,87,110,124,139],"moving":[3],"in":[4,34,77,100,135,150,153,162],"the":[5,35,78,84,127,130,142],"high":[6],"performance":[7],"era":[8],"with":[9,18,53,166],"fast":[10],"steps.":[11],"The":[12],"ability":[13],"to":[14,182],"manufacture":[15],"rich":[16],"components,":[17],"large":[19,151],"numbers":[20],"of":[21,37,65,83,129,145],"resources":[22],"at":[23,195],"relative":[24],"low":[25,192],"cost,":[26],"has":[27],"made":[28],"cost":[30,41],"a":[31,93,163,191],"considerable":[32],"figure":[33],"lifetime":[36],"modern":[38,154],"circuits.":[39],"Design":[40],"can":[42,50,157],"be":[43,51,158],"reduced":[44,196],"by":[45,113],"reducing":[46],"time,":[48],"which":[49],"achieved":[52],"appropriate":[54],"methodologies,":[55],"improving":[56],"designer":[57],"productivity":[58],"like":[59],"high-level":[60],"synthesis.":[61],"After":[62],"many":[63],"years":[64],"research,":[66],"such":[67],"toolflows":[68],"have":[69],"lately":[70],"reached":[71],"mainstream":[72],"industry,":[73],"offering":[74],"quality-of-results":[75],"especially":[76],"FPGA":[79,115,155],"domain.":[80],"While":[81],"most":[82],"times":[85],"C/C++":[86,94],"used":[88,125],"as":[89],"input":[90],"language,":[91],"OpenCL,":[92],"extension":[95],"introduced":[96],"for":[97,126],"application":[98],"development":[99],"heterogeneous":[101],"multi-core":[102],"architectures,":[103],"utilizing":[104],"different":[105],"CPUs,":[106],"DSPs":[107],"and":[108,160,169,190],"GPUs,":[109],"gaining":[111],"acceptance":[112],"major":[114],"vendors.":[116],"In":[117],"this":[118],"paper":[119],"an":[120],"OpenCL":[121],"based":[122],"environment":[123],"Back":[131],"Projection":[132],"algorithm,":[133],"found":[134,149],"medical":[136],"devices.":[137],"It":[138],"shown":[140],"that":[141],"fine":[143],"granularity":[144],"parallel":[146],"computational":[147],"blocks,":[148],"amounts":[152],"devices,":[156],"captured":[159],"exploited":[161],"natural":[164],"way":[165],"OpenCL's":[167],"constructs":[168],"offer":[170,187],"implementation":[171,184],"improvements":[172],"(5X-10X":[173],"average":[174],"speedup)":[175],"over":[176],"more":[177],"complicated":[178],"coding":[179],"techniques.":[180],"Compared":[181],"other":[183],"platforms,":[185],"FPGAs":[186],"performance,":[188],"scalability":[189],"power":[193],"alternative,":[194],"cost.":[197]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
