{"id":"https://openalex.org/W1988150112","doi":"https://doi.org/10.1145/2754930","title":"Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures","display_name":"Efficient Control and Communication Paradigms for Coarse-Grained Spatial Architectures","publication_year":2015,"publication_date":"2015-09-11","ids":{"openalex":"https://openalex.org/W1988150112","doi":"https://doi.org/10.1145/2754930","mag":"1988150112"},"language":"en","primary_location":{"id":"doi:10.1145/2754930","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2754930","pdf_url":null,"source":{"id":"https://openalex.org/S193109227","display_name":"ACM Transactions on Computer Systems","issn_l":"0734-2071","issn":["0734-2071","1557-7333"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Computer Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009910914","display_name":"Michael Pellauer","orcid":"https://orcid.org/0000-0002-5305-4307"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Michael Pellauer","raw_affiliation_strings":["Intel, NVIDIA, Hudson, MA"],"affiliations":[{"raw_affiliation_string":"Intel, NVIDIA, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024901904","display_name":"Angshuman Parashar","orcid":"https://orcid.org/0000-0001-9936-6501"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Angshuman Parashar","raw_affiliation_strings":["Intel, NVIDIA, Hudson, MA"],"affiliations":[{"raw_affiliation_string":"Intel, NVIDIA, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109306000","display_name":"Michael Adler","orcid":null},"institutions":[{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Adler","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005443434","display_name":"Bushra Ahsan","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bushra Ahsan","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042818004","display_name":"R. Allmon","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Randy Allmon","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060189926","display_name":"Neal Crago","orcid":"https://orcid.org/0000-0001-7774-0531"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Neal Crago","raw_affiliation_strings":["Intel, NVIDIA, Hudson, MA"],"affiliations":[{"raw_affiliation_string":"Intel, NVIDIA, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027505039","display_name":"Kermin Fleming","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kermin Fleming","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075681742","display_name":"Mohit Gambhir","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohit Gambhir","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078825915","display_name":"Aamer Jaleel","orcid":"https://orcid.org/0000-0002-5709-2992"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aamer Jaleel","raw_affiliation_strings":["Intel, NVIDIA, Hudson, MA"],"affiliations":[{"raw_affiliation_string":"Intel, NVIDIA, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034089074","display_name":"Tushar Krishna","orcid":"https://orcid.org/0000-0001-5738-6942"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tushar Krishna","raw_affiliation_strings":["Intel, Georgia Institute of Technology, Hudson, MA","Intel, Georgia Institute of Technology, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Georgia Institute of Technology, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I130701444","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Georgia Institute of Technology, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078894707","display_name":"Daniel Lustig","orcid":"https://orcid.org/0000-0001-9763-7304"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel Lustig","raw_affiliation_strings":["Princeton University","Princeton University#TAB#"],"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Princeton University#TAB#","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082025700","display_name":"Stephen Maresh","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephen Maresh","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034290853","display_name":"\u0412. \u0412. \u041f\u0430\u0432\u043b\u043e\u0432","orcid":"https://orcid.org/0000-0002-0629-5765"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vladimir Pavlov","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009749854","display_name":"Rachid Rayess","orcid":null},"institutions":[{"id":"https://openalex.org/I1330254920","display_name":"Hudson Institute","ror":"https://ror.org/014n3ck53","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1330254920"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rachid Rayess","raw_affiliation_strings":["Intel, Hudson, MA","Intel, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel, Hudson, MA","institution_ids":["https://openalex.org/I1330254920","https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053597061","display_name":"Antonia Zhai","orcid":"https://orcid.org/0000-0002-8921-1415"},"institutions":[{"id":"https://openalex.org/I2800403580","display_name":"University of Minnesota System","ror":"https://ror.org/03grvy078","country_code":"US","type":"education","lineage":["https://openalex.org/I2800403580"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Antonia Zhai","raw_affiliation_strings":["University of Minnesota"],"affiliations":[{"raw_affiliation_string":"University of Minnesota","institution_ids":["https://openalex.org/I2800403580"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024384625","display_name":"Joel Emer","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1304085615","display_name":"Nvidia (United Kingdom)","ror":"https://ror.org/02kr42612","country_code":"GB","type":"company","lineage":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Joel Emer","raw_affiliation_strings":["Intel and MIT, NVIDIA, Hudson, MA","Intel and MIT, NVIDIA, Hudson, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel and MIT, NVIDIA, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel and MIT, NVIDIA, Hudson, MA#TAB#","institution_ids":["https://openalex.org/I1304085615"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":16,"corresponding_author_ids":["https://openalex.org/A5009910914"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":1.9379,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.85635757,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"33","issue":"3","first_page":"1","last_page":"32"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9238424301147461},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.6608218550682068},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6597805023193359},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5604659914970398},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5088515281677246},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47428637742996216},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4375646114349365},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.4111612141132355},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.38233309984207153},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3615456819534302},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.34278959035873413},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.27878016233444214},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16064268350601196},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.12912589311599731}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9238424301147461},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.6608218550682068},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6597805023193359},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5604659914970398},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5088515281677246},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47428637742996216},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4375646114349365},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.4111612141132355},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.38233309984207153},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3615456819534302},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.34278959035873413},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.27878016233444214},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16064268350601196},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.12912589311599731},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2754930","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2754930","pdf_url":null,"source":{"id":"https://openalex.org/S193109227","display_name":"ACM Transactions on Computer Systems","issn_l":"0734-2071","issn":["0734-2071","1557-7333"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Computer Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W105298322","https://openalex.org/W1501077214","https://openalex.org/W1506687165","https://openalex.org/W1857327297","https://openalex.org/W1985108724","https://openalex.org/W2005345974","https://openalex.org/W2017086619","https://openalex.org/W2020018359","https://openalex.org/W2040514473","https://openalex.org/W2049558311","https://openalex.org/W2056999868","https://openalex.org/W2060736133","https://openalex.org/W2066210260","https://openalex.org/W2095353352","https://openalex.org/W2097117297","https://openalex.org/W2098416053","https://openalex.org/W2099129242","https://openalex.org/W2107923684","https://openalex.org/W2115294662","https://openalex.org/W2115611348","https://openalex.org/W2121082877","https://openalex.org/W2122992089","https://openalex.org/W2130408605","https://openalex.org/W2137380783","https://openalex.org/W2142501475","https://openalex.org/W2147345262","https://openalex.org/W2160566592","https://openalex.org/W2163599210","https://openalex.org/W2164939754","https://openalex.org/W2165099691","https://openalex.org/W2171532807","https://openalex.org/W2172212694","https://openalex.org/W2180088390","https://openalex.org/W2295946175","https://openalex.org/W2316749154","https://openalex.org/W2561675875","https://openalex.org/W3143533263","https://openalex.org/W4239997146","https://openalex.org/W4250273962","https://openalex.org/W4298064752"],"related_works":["https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2153202644","https://openalex.org/W2010970156","https://openalex.org/W2105895556","https://openalex.org/W2733115356","https://openalex.org/W2377593213","https://openalex.org/W4235861380","https://openalex.org/W2106625514","https://openalex.org/W1867214769"],"abstract_inverted_index":{"There":[0],"has":[1],"been":[2],"recent":[3],"interest":[4],"in":[5,39,178],"exploring":[6],"the":[7,40,49,74,128,171,179,192,195],"acceleration":[8],"of":[9,51,95,130,173,194],"nonvectorizable":[10],"workloads":[11],"with":[12],"spatially":[13],"programmed":[14],"architectures":[15],"that":[16,142,167],"are":[17],"designed":[18],"to":[19,32,44,81,122],"efficiently":[20,33],"exploit":[21],"pipeline":[22],"parallelism.":[23],"Such":[24],"an":[25],"architecture":[26],"faces":[27],"two":[28],"main":[29],"problems:":[30],"how":[31,43],"control":[34,97,169],"each":[35],"processing":[36],"element":[37],"(PE)":[38],"system,":[41],"and":[42,67,78,105,137,149,175,184],"facilitate":[45],"inter-PE":[46,96],"communication":[47,94],"without":[48,86],"overheads":[50],"traditional":[52,161],"shared-memory":[53],"coherent":[54],"memory.":[55],"In":[56],"this":[57],"article,":[58],"we":[59],"explore":[60],"solving":[61],"these":[62,116],"problems":[63],"using":[64,146],"triggered":[65,147,168],"instructions":[66,71,148,177],"latency-insensitive":[68,150],"channels.":[69],"Triggered":[70],"completely":[72],"eliminate":[73],"program":[75],"counter":[76],"(PC)":[77],"allow":[79,92],"programs":[80],"transition":[82],"concisely":[83],"between":[84],"states":[85],"explicit":[87],"branch":[88],"instructions.":[89],"Latency-insensitive":[90],"channels":[91,151],"efficient":[93],"information":[98],"while":[99],"simultaneously":[100],"enabling":[101],"flexible":[102],"code":[103],"placement":[104],"improving":[106],"tolerance":[107],"for":[108],"variable":[109],"events":[110],"such":[111,132],"as":[112,133],"cache":[113],"accesses.":[114],"Together,":[115],"approaches":[117],"provide":[118],"a":[119,143,160,188],"unified":[120],"mechanism":[121],"avoid":[123],"overserialized":[124],"execution,":[125],"essentially":[126],"achieving":[127],"effect":[129],"techniques":[131],"dynamic":[134,176],"instruction":[135],"reordering":[136],"multithreading.":[138],"Our":[139],"analysis":[140,165],"shows":[141,166],"spatial":[144,196],"accelerator":[145],"can":[152],"achieve":[153],"8":[154],"\u00d7":[155],"greater":[156],"area-normalized":[157],"performance":[158,193],"than":[159],"general-purpose":[162],"processor.":[163],"Further":[164],"reduces":[170],"number":[172],"static":[174],"critical":[180],"paths":[181],"by":[182,199],"62%":[183],"64%,":[185],"respectively,":[186],"over":[187],"PC-style":[189],"baseline,":[190],"increasing":[191],"programming":[197],"approach":[198],"2.0":[200],"\u00d7.":[201]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}