{"id":"https://openalex.org/W2019642625","doi":"https://doi.org/10.1145/2744769.2744845","title":"GRIP","display_name":"GRIP","publication_year":2015,"publication_date":"2015-06-02","ids":{"openalex":"https://openalex.org/W2019642625","doi":"https://doi.org/10.1145/2744769.2744845","mag":"2019642625"},"language":"en","primary_location":{"id":"doi:10.1145/2744769.2744845","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2744769.2744845","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 52nd Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036405378","display_name":"Munish Jassi","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Munish Jassi","raw_affiliation_strings":["Technische Universit\u00e4t M\u00fcnchen"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011419637","display_name":"Daniel Mueller-Gritschneder","orcid":"https://orcid.org/0000-0003-0903-631X"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Daniel M\u00fcller-Gritschneder","raw_affiliation_strings":["Technische Universit\u00e4t M\u00fcnchen"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017567485","display_name":"Ulf Schlichtmann","orcid":"https://orcid.org/0000-0003-4431-7619"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulf Schlichtmann","raw_affiliation_strings":["Technische Universit\u00e4t M\u00fcnchen"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036405378"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":null,"apc_paid":null,"fwci":0.6595,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.69689119,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.6849176287651062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.67576003074646},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4945089519023895},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.4624607264995575},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4582888185977936},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.43591347336769104},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40539494156837463},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24703183770179749}],"concepts":[{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.6849176287651062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.67576003074646},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4945089519023895},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4624607264995575},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4582888185977936},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.43591347336769104},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40539494156837463},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24703183770179749},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2744769.2744845","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2744769.2744845","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 52nd Annual Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G8905968131","display_name":null,"funder_award_id":"SCHL 347/3-1","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W165616604","https://openalex.org/W1567549664","https://openalex.org/W1963917474","https://openalex.org/W2034017042","https://openalex.org/W2046679083","https://openalex.org/W2047845988","https://openalex.org/W2082197767","https://openalex.org/W2096258287","https://openalex.org/W2108924389","https://openalex.org/W2114431978","https://openalex.org/W2115304935","https://openalex.org/W2120429086","https://openalex.org/W2128637218","https://openalex.org/W2135764373","https://openalex.org/W2136314619","https://openalex.org/W2143331258","https://openalex.org/W2154635391","https://openalex.org/W2163479900","https://openalex.org/W2202571840","https://openalex.org/W4285719527","https://openalex.org/W7002034614"],"related_works":["https://openalex.org/W2384475851","https://openalex.org/W3142211975","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2130914040","https://openalex.org/W2119122672","https://openalex.org/W4292904049","https://openalex.org/W2136848245","https://openalex.org/W1978899622","https://openalex.org/W4213404769"],"abstract_inverted_index":{"Increased":[0],"hardware":[1],"IP":[2,18,36,67,76,103,127,144],"reuse":[3],"is":[4,20],"required":[5],"to":[6,79,92],"meet":[7],"the":[8,12,89,94,98,102,115,120,149],"productivity":[9],"demands":[10],"for":[11,114,129],"future":[13],"complex":[14],"Systems-on-Chip":[15],"(SoC).":[16],"Nowadays,":[17],"integration":[19,37,45,84,99,145],"enabled":[21],"using":[22,54,97,143],"standardized":[23],"meta-data":[24],"formats":[25],"such":[26],"as":[27],"IP-XACT.":[28,56],"We":[29,118],"present":[30],"a":[31,48,63,124,140],"new":[32],"concept":[33],"called":[34],"grammar-based":[35],"and":[38],"packaging":[39],"(GRIP),":[40],"which":[41],"additionally":[42],"encodes":[43],"design":[44,95,109,134],"knowledge":[46,100,146],"into":[47,62],"set":[49],"of":[50,66,101],"graph":[51],"re-writing":[52],"rules":[53,59,91],"standard":[55],"These":[57],"GRIP":[58,90,121,150],"are":[60,136],"packaged":[61],"domain-specific":[64],"library":[65,70,128],"blocks.":[68],"The":[69,105],"can":[71,86],"be":[72],"supplied":[73],"by":[74,148],"an":[75,80],"provider":[77],"along":[78],"SoC":[81,116],"architect.":[82,117],"An":[83],"tool":[85,106],"automatically":[87,137],"use":[88],"search":[93],"space":[96],"provider.":[104],"generates":[107],"all":[108],"alternatives":[110,135],"with":[111],"different":[112],"trade-offs":[113],"demonstrate":[119],"approach":[122],"on":[123],"computer":[125],"vision":[126],"FPGA-based":[130],"SoCs.":[131],"Eighteen":[132],"functional":[133],"generated":[138],"within":[139],"few":[141],"hours":[142],"encoded":[147],"rules.":[151]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2016-06-24T00:00:00"}
