{"id":"https://openalex.org/W2006605505","doi":"https://doi.org/10.1145/2742060.2742091","title":"Reconfigurable","display_name":"Reconfigurable","publication_year":2015,"publication_date":"2015-05-19","ids":{"openalex":"https://openalex.org/W2006605505","doi":"https://doi.org/10.1145/2742060.2742091","mag":"2006605505"},"language":"en","primary_location":{"id":"doi:10.1145/2742060.2742091","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742091","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030856490","display_name":"Michail Mavropoulos","orcid":"https://orcid.org/0000-0003-3289-5315"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Michail Mavropoulos","raw_affiliation_strings":["Department of Computer Engineering & Informatics, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering & Informatics, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074371053","display_name":"\u0393\u03b5\u03ce\u03c1\u03b3\u03b9\u03bf\u03c2 \u039a\u03b5\u03c1\u03b1\u03bc\u03af\u03b4\u03b1\u03c2","orcid":"https://orcid.org/0000-0003-0460-6061"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Georgios Keramidas","raw_affiliation_strings":["Department of Computer Engineering & Informatics, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering & Informatics, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064667431","display_name":"Grigorios Adamopoulos","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Grigorios Adamopoulos","raw_affiliation_strings":["Department of Computer Engineering & Informatics, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering & Informatics, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111875543","display_name":"Dimitris Nikolos","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitris Nikolos","raw_affiliation_strings":["Department of Computer Engineering & Informatics, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering & Informatics, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5030856490"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":0.1973,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.577468,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"161","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.8427767753601074},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7947937250137329},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.721237301826477},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6125029921531677},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5529972910881042},{"id":"https://openalex.org/keywords/burn-in","display_name":"Burn-in","score":0.5222440361976624},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4910922050476074},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47087419033050537},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4244779348373413},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4117295742034912},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.38668566942214966},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.36481404304504395},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.2679489850997925},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1806524693965912},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14808714389801025},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13686051964759827}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.8427767753601074},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7947937250137329},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.721237301826477},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6125029921531677},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5529972910881042},{"id":"https://openalex.org/C179707776","wikidata":"https://www.wikidata.org/wiki/Q662895","display_name":"Burn-in","level":2,"score":0.5222440361976624},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4910922050476074},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47087419033050537},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4244779348373413},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4117295742034912},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.38668566942214966},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.36481404304504395},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2679489850997925},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1806524693965912},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14808714389801025},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13686051964759827}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2742060.2742091","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742091","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321038","display_name":"Fonds National de la Recherche Luxembourg","ror":"https://ror.org/039z13y21"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1702767802","https://openalex.org/W1981044614","https://openalex.org/W1992912817","https://openalex.org/W2002038549","https://openalex.org/W2007400650","https://openalex.org/W2015833639","https://openalex.org/W2041567848","https://openalex.org/W2074088899","https://openalex.org/W2093108390","https://openalex.org/W2099339734","https://openalex.org/W2100093263","https://openalex.org/W2104509890","https://openalex.org/W2112776829","https://openalex.org/W2119306084","https://openalex.org/W2119465432","https://openalex.org/W2131143090","https://openalex.org/W2138374118","https://openalex.org/W2143285027","https://openalex.org/W2161197576","https://openalex.org/W2162707747","https://openalex.org/W2167188929","https://openalex.org/W4238002809","https://openalex.org/W4247641071"],"related_works":["https://openalex.org/W2119312496","https://openalex.org/W4247460323","https://openalex.org/W2537086382","https://openalex.org/W2107909712","https://openalex.org/W2153162275","https://openalex.org/W2079259690","https://openalex.org/W2108986771","https://openalex.org/W789543267","https://openalex.org/W2004965314","https://openalex.org/W2094295436"],"abstract_inverted_index":{"Processor":[0],"caches":[1],"play":[2],"a":[3,23,29,92,101,113,118,131,191,198],"critical":[4],"role":[5],"in":[6,28,47,70,98,107,112,180],"the":[7,48,51,55,75,81,88,108,121,153,156,160,167,174,181,184],"performance":[8],"of":[9,26,38,50,74,83,95,100,104,120,142,155,169,176,194,200],"today\"s":[10],"computer":[11],"systems.":[12],"As":[13],"technology":[14],"scales,":[15],"due":[16],"to":[17,33,44,67],"manufacturing":[18],"defects":[19],"and":[20,46,183,197],"process":[21],"variations":[22],"large":[24],"number":[25,37,94,103,175],"cells":[27,40],"cache":[30,137],"is":[31,79,85,124,145],"expected":[32],"be":[34],"faulty.":[35],"The":[36,139],"faulty":[39,161],"varies":[41],"from":[42],"die":[43,45],"field":[49],"application":[52],"depends":[53],"on":[54,173],"operating":[56],"conditions":[57],"(e.g.,":[58,106],"supply":[59,110],"voltage,":[60],"frequency).":[61],"Several":[62],"techniques":[63,78],"have":[64],"been":[65],"proposed":[66],"tolerate":[68],"faults":[69,105],"caches.":[71],"A":[72],"drawback":[73],"redundancy":[76,84],"based":[77],"that":[80,146,209],"amount":[82],"decided":[86],"at":[87],"design":[89],"time":[90],"targeting":[91],"maximum":[93],"faults,":[96,177],"so":[97],"cases":[99],"small":[102],"nominal":[109],"voltage":[111],"system":[114],"with":[115,203],"DVS)":[116],"only":[117],"part":[119],"redundant":[122],"resources":[123,150],"used.":[125],"In":[126],"this":[127],"paper":[128],"we":[129],"propose":[130],"new":[132],"reconfigurable-self":[133],"adaptive":[134],"fault":[135,201],"tolerant":[136],"scheme.":[138],"unique":[140],"characteristic":[141],"our":[143,210],"scheme":[144],"it":[147],"uses":[148],"its":[149],"for":[151,166,190],"both":[152],"reduction":[154,168],"misses":[157],"caused":[158],"by":[159],"blocks":[162],"as":[163,165],"well":[164],"conflict":[170],"misses,":[171],"depending":[172],"their":[178],"distribution":[179],"cache,":[182],"running":[185],"application.":[186],"Our":[187],"experimental":[188],"results":[189],"wide":[192],"range":[193],"scientific":[195],"applications":[196],"plethora":[199],"maps":[202],"different":[204],"SRAM":[205],"failure":[206],"probabilities":[207],"reveal":[208],"proposal":[211],"can":[212],"achieve":[213],"significant":[214],"benefits.":[215]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}